TMS320VC5507 datasheet(100/108 Pages) TI1

номер детали	TMS320VC5507

подробное описание детали	Fixed-Point Digital Signal Processor

PDF	108 Pages

Scroll/Zoom	100%

производитель	TI1 [Texas Instruments]

домашняя страница	http://www.ti.com

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100 / 108 page

HR/W

Read Data

HRDY

HCNTL[1:0]

HAS

HCS

HD[15:0]

(read)

E11

E13

Valid (10 or 00)

Write Data

HD[15:0]

(write)

E12

E13

E17

E18

Read

Write

HDS

E15

E16

E15

E12

E11

E20

E19

E14

E20

E19

Valid (10 or 00)

E14

HBE[1:0]

Valid

NOTES: A. During autoincrement mode, although the EHPI internally increments the memory address, reads of the HPIA register by the host

will always indicate the base address.

B. The falling edge of HCS must occur concurrent with or before the falling edge of HDS. The rising edge of HCS must occur

concurrent with or after the rising edge of HDS. If HDS1 and/or HDS2 are tied permanently active and HCS is used as a strobe,

the timing requirements shown for HDS apply to HCS. HRDY is always driven to the same value as its internal state.

SM320VC5507-EP

SPRS613 – SEPTEMBER 2009

www.ti.com

Figure 5-36. EHPI Multiplexed Register Read/Write Timings

100

Electrical Specifications

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