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TMS320VC5507 датащи(PDF) 36 Page - Texas Instruments |
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TMS320VC5507 датащи(HTML) 36 Page - Texas Instruments |
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36 / 108 page ![]() 15 6 5 4 3 2 1 0 Reserved GPIOEN13 GPIOEN12 GPIOEN11 GPIOEN10 GPIOEN9 GPIOEN8 R, 0000 0000 00 R/W, 0 R/W, 0 R/W, 0 R/W, 0 R/W, 0 R/W, 0 LEGEND: R = Read, W = Write, n = value after reset 15 6 5 4 3 2 1 0 Reserved GPIODIR13 GPIODIR12 GPIODIR11 GPIODIR10 GPIODIR9 GPIODIR8 R, 0000 0000 00 R/W, 0 R/W, 0 R/W, 0 R/W, 0 R/W, 0 R/W, 0 LEGEND: R = Read, W = Write, n = value after reset 15 6 5 4 3 2 1 0 Reserved GPIOD13 GPIOD12 GPIOD11 GPIOD10 GPIOD9 GPIOD8 R, 0000 0000 00 R/W, 0 R/W, 0 R/W, 0 R/W, 0 R/W, 0 R/W, 0 LEGEND: R = Read, W = Write, n = value after reset SM320VC5507-EP SPRS613 – SEPTEMBER 2009 www.ti.com 3.7.3 EHPI General-Purpose I/O Six control lines of the External Parallel Bus can also be set as general-purpose I/O when the Parallel Port Mode bit field of the External Bus Selection Register is set to Nonmultiplexed EHPI (10) or Multiplexed EHPI mode (11). These pins are controlled by three registers: the enable register, EHPIGPIOEN, determines if the pins serve as GPIO or address (see Figure 3-12); the direction register, EHPIGPIODIR, determines if the GPIO enabled pin is an input or output (see Figure 3-13); and the data register, EHPIGPIODATA, determines the logic states of the pins in GPIO mode (see Figure 3-14). Figure 3-12. EHPI GPIO Enable Register (EHPIGPIOEN) Bit Layout Table 3-12. EHPI GPIO Enable Register (EHPIGPIOEN) Bit Functions RESET BIT NO. BIT NAME FUNCTION VALUE 15 −6 Reserved 0 Reserved Enable or disable GPIO function of EHPI Control Bus. GPIOEN13 − 5 −0 0 GPIOENx = 0; GPIO function of GPIOx line is disabled. GPIOEN8 GPIOENx = 1; GPIO function of GPIOx line is enabled. Figure 3-13. EHPI GPIO Direction Register (EHPIGPIODIR) Bit Layout Table 3-13. EHPI GPIO Direction Register (EHPIGPIODIR) Bit Functions RESET BIT NO. BIT NAME FUNCTION VALUE 15 −6 Reserved 0 Reserved Data direction bits that configure the EHPI Control Bus configured as I/O pins as either input or output GPIODIR13 pins. 5 −0 − 0 GPIODIRx = 0; Configure corresponding pin as an input. GPIODIR8 GPIODIRx = 1; Configure corresponding pin as an output. Figure 3-14. EHPI GPIO Data Register (EHPIGPIODATA) Bit Layout 36 Functional Overview Copyright © 2009, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): SM320VC5507-EP |
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