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TMS320VC5507 датащи(PDF) 30 Page - Texas Instruments |
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TMS320VC5507 датащи(HTML) 30 Page - Texas Instruments |
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30 / 108 page ![]() SM320VC5507-EP SPRS613 – SEPTEMBER 2009 www.ti.com Table 3-5. External Bus Selection Register Bit Field Description (continued) BITS DESCRIPTION EMIF hold HOLD = 0: DSP drives the external memory bus 10 HOLD = 1: Request the external memory bus to be placed in high-impedance so that another device can drive the memory bus EMIF hold acknowledge HOLDA = 0: DSP indicates that a hold request on the external memory bus has occured, the EMIF completed any pending external bus activity, and placed the external memory bus 9 signals in high-impedance state (address bus, data bus, CE[3:0], AOE, AWE, ARE, SDRAS, SDCAS, SDWE, SDA10, CLKMEM). Once this bit is cleared, an external device can drive the bus. HOLDA = 1: No hold acknowledge SDRAM CKE pin selection bit 8 CKE SEL = 0: Use XF for SDRAM CKE signal CKE SEL = 1: Use GPIO.4 for SDRAM CKE signal SDRAM CKE enable bit 7 CKE EN = 0: XF or GPIO.4 operates in normal mode CKE EN = 1: Based on the CKE SEL bit, either XF or GPIO.4 drives the SDRAM CKE pin SDRAM self-refresh command 6 SR CMD = 0: EMIF will not issue a SDRAM self-refresh command SR CMD = 1: EMIF will issue a SDRAM self-refresh command 5-2 Reserved. Must be kept as 0000 during any writes to EBSR. Parallel port mode. EMIF/HPI/GPIO Mode. Determines the mode of the parallel port. Parallel Port Mode = 00: Data EMIF mode. The 16 EMIF data signals and 13 EMIF control signals are routed to the corresponding external parallel bus data and control signals. The 16 address bus signals can be used as general-purpose I/O only. Parallel Port Mode = 01: Full EMIF mode. The 21 address signals, 16 data signals, and 15 control signals are routed to the corresponding external parallel bus address, data, and control signals. Non-multiplexed HPI mode. The HPI is enabled an its 14 address signals, 16 data 1-0 signals, and 7 control signals are routed to the corresponding address, data, control Parallel Port Mode = 10: signals of the external parallel bus. Moreover, 8 control signals of the external parallel bus are used as general-purpose I/O. Parallel Port Mode = 11: Multiplexed HPI mode. The HPI is enabled and its 16 data signals and 10 control signals are routed to the external parallel bus. In addition, 3 control signals of the external parallel bus are used as general-purpose I/O. The 16 external parallel port address bus signals are used as general-purpose I/O. 3.6.2 Parallel Port The parallel port of the 5507 consists of 21 address signals, 16 data signals, and 15 control signals. Its 14 bits for address allow it to access 2M bytes of external memory when using the asynchronous SRAM interface. On the other hand, the SDRAM interface can access the whole external memory space of 16M bytes. The parallel bus supports four different modes: • Full EMIF mode: the EMIF with its 21 address signals, 16 data signals, and 15 control signals routed to the corresponding external parallel bus address, data, and control signals. • Data EMIF mode: the EMIF with its 16 data signals, and 15 control signals routed to the corresponding external parallel bus data and control signals. The 16 address bus signals can be used as general-purpose I/O signals only. • Non-multiplexed HPI mode: the HPI is enabled with its 14 address signals, 16 data signals, and 8 control signals routed to the corresponding address, data, and control signals of the external parallel bus. Moreover, 7 control signals of the external parallel bus are used as general-purpose I/O. • Multiplexed HPI mode: the HPI is enabled with its 16 data signals and 10 control signals routed to the external parallel bus. In addition, 5 control signals of the external parallel bus are used as general-purpose I/O. The external parallel port’s 16 address signals are used as general-purpose I/O. 30 Functional Overview Copyright © 2009, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): SM320VC5507-EP |
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