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TMS320VC5507 датащи(PDF) 70 Page - Texas Instruments |
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TMS320VC5507 датащи(HTML) 70 Page - Texas Instruments |
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70 / 108 page ![]() SM320VC5507-EP SPRS613 – SEPTEMBER 2009 www.ti.com NOTE The RTC can be idled by not supplying its 32-kHz oscillator signal. In order to keep RTC power dissipation to a minimum when the RTC module is not used, it is recommended that the RTC module be powered up, the RTC input pin (RTCINX1) be pulled low, and the RTC output pin (RTCINX2) be left floating. Table 5-6. Recommended RTC Crystal Parameters PARAMETER MIN NOM MAX UNIT fo Frequency of oscillation(1) 32.768 kHz ESR Series resistance(1) 30 60 k Ω CL Load capacitance 12.5 pF DL Crystal drive level 1 μW (1) ESR must be 200 k Ω or greater at frequencies other than 32.768 kHz. Otherwise, oscillations at overtone frequencies may occur. 5.7 Memory Interface Timings 5.7.1 Asynchronous Memory Timings Table 5-7 and Table 5-8 assume testing over recommended operating conditions (see Figure 5-6 and Figure 5-7). Table 5-7. Asynchronous Memory Cycle Timing Requirements CVDD = 1.2 V CVDD = 1.6 V CVDD = 1.35 V NO. UNIT MIN MAX MIN MAX M1 tsu (DV–COH) Setup time, read data valid before CLKOUT high(1) 6 5 ns M2 th (COH–DV) Hold time, read data valid after CLKOUT high 0 0 ns M3 tsu (ARDY–COH) Setup time, ARDY valid before CLKOUT high(1) 10 7 ns M4 th (COH–ARDY) Hold time, ARDY valid after CLKOUT high 0 0 ns (1) To ensure data setup time, simply program the strobe width wide enough. ARDY is internally synchronized. If ARDY does meet setup or hold time, it may be recognized in the current cycle or the next cycle. Thus, ARDY can be an asynchronous input. Table 5-8. Asynchronous Memory Cycle Switching Characteristics CVDD = 1.2 V CVDD = 1.6 V CVDD = 1.35 V NO. UNIT MIN MAX MIN MAX M5 td (COH–CEV) Delay time, CLKOUT high to CEx valid -2 4 -2 4 ns M6 td (COH–CEIV) Delay time, CLKOUT high to CEx invalid -2 4 -2 4 ns M7 td (COH–BEV) Delay time, CLKOUT high to BEx valid 4 4 ns M8 td (COH–BEIV) Delay time, CLKOUT high to BEx invalid -2 -2 ns M9 td (COH–AV) Delay time, CLKOUT high to address valid 4 4 ns M10 td (COH–AIV) Delay time, CLKOUT high to address invalid -2 -2 ns M11 td (COH–AOEV) Delay time, CLKOUT high to AOE valid -2 4 -2 4 ns M12 td (COH–AOEIV) Delay time, CLKOUT high to AOE invalid -2 4 -2 4 ns M13 td (COH–AREV) Delay time, CLKOUT high to ARE valid -2 4 -2 4 ns M14 td (COH–AREIV) Delay time, CLKOUT high to ARE invalid -2 4 -2 4 ns M15 td (COH–DV) Delay time, CLKOUT high to data valid 4 4 ns M16 td (COH–DIV) Delay time, CLKOUT high to data invalid -2 -2 ns M17 td (COH–AWEV) Delay time, CLKOUT high to AWE valid -2 4 -2 4 ns M18 td (COH–AWEIV) Delay time, CLKOUT high to AWE invalid -2 4 -2 4 ns 70 Electrical Specifications Copyright © 2009, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): SM320VC5507-EP |
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