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TMS320VC5507 датащи(PDF) 77 Page - Texas Instruments |
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TMS320VC5507 датащи(HTML) 77 Page - Texas Instruments |
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77 / 108 page ![]() M23 M37 M22 M36 CLKMEM CEx† BEx ‡ EMIF.A[13:0] D[15:0] SDA10 SDRAS SDCAS SDWE M28 M29 REFR † The chip enable that becomes active depends on the address being accessed. ‡ All BE[1:0] signals are driven low (active) during reads. Byte manipulation of the read data is performed inside the EMIF. These signals remain active until the next access that is not an SDRAM read occurs. SM320VC5507-EP www.ti.com SPRS613 – SEPTEMBER 2009 Figure 5-12. SDRAM REFR Command Copyright © 2009, Texas Instruments Incorporated Electrical Specifications 77 Submit Documentation Feedback Product Folder Link(s): SM320VC5507-EP |
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