TMS320VC5507 datasheet(6/108 Pages) TI1

6 / 108 page

SM320VC5507-EP

SPRS613 – SEPTEMBER 2009

www.ti.com

List of Tables

2-1

Pin Assignments for the PGE Package

....................................................................................... 12

2-2

Signal Descriptions

............................................................................................................... 13

3-1

DARAM Blocks

................................................................................................................... 24

3-2

SARAM Blocks

................................................................................................................... 24

3-3

Boot Configuration Summary

................................................................................................... 26

3-4

Synchronization Control Function

.............................................................................................. 28

3-5

External Bus Selection Register Bit Field Description

....................................................................... 29

3-6

SM320VC5507 Parallel Port Signal Routing

.................................................................................. 31

3-7

I/O Direction Register (IODIR) Bit Functions

................................................................................. 34

3-8

I/O Data Register (IODATA) Bit Functions

.................................................................................... 34

3-9

Address/GPIO Enable Register (AGPIOEN) Bit Functions

................................................................. 35

3-10

Address/GPIO Direction Register (AGPIODIR) Bit Functions

.............................................................. 35

3-11

Address/GPIO Data Register (AGPIODATA) Bit Functions

................................................................ 35

3-12

EHPI GPIO Enable Register (EHPIGPIOEN) Bit Functions

................................................................ 36

3-13

EHPI GPIO Direction Register (EHPIGPIODIR) Bit Functions

............................................................. 36

3-14

EHPI GPIO Data Register (EHPIGPIODATA) Bit Functions

............................................................... 37

3-15

System Register Bit Fields

...................................................................................................... 37

3-16

USB PLL Selection and Status Register Bit Functions

...................................................................... 38

3-17

USB APLL Clock Mode Register Bit Functions

.............................................................................. 39

3-18

M and D Values Based on MODE, DIV, and K

............................................................................... 39

3-19

CPU Memory-Mapped Registers

............................................................................................... 40

3-20

Idle Control, Status, and System Registers

................................................................................... 42

3-21

External Memory Interface Registers

.......................................................................................... 42

3-22

DMA Configuration Registers

................................................................................................... 43

3-23

Real-Time Clock Registers

...................................................................................................... 45

3-24

Clock Generator

.................................................................................................................. 46

3-25

Timers

.............................................................................................................................. 46

3-26

Multichannel Serial Port #0

..................................................................................................... 46

3-27

Multichannel Serial Port #1

..................................................................................................... 47

3-28

Multichannel Serial Port #2

..................................................................................................... 48

3-29

GPIO

............................................................................................................................... 49

3-30

Device Revision ID

............................................................................................................... 49

3-31

2C Module Registers

........................................................................................................... 49

3-32

Watchdog Timer Registers

...................................................................................................... 50

3-33

USB Module Registers

.......................................................................................................... 50

3-34

Analog-to-Digital Controller (ADC) Registers

................................................................................. 52

3-35

External Bus Selection Register

................................................................................................ 52

3-36

Interrupt Table

.................................................................................................................... 52

3-37

IFR0 and IER0 Register Bit Fields

............................................................................................. 53

3-38

IFR1 and IER1 Register Bit Fields

............................................................................................. 54

5-1

Recommended Crystal Parameters

............................................................................................ 66

5-2

CLKIN Timing Requirements

................................................................................................... 67

5-3

CLKOUT Switching Characteristics

............................................................................................ 67

5-4

CLKIN Timing Requirements

................................................................................................... 68

5-5

Multiply-By-N Clock Option Switching Characteristics

...................................................................... 69

5-6

Recommended RTC Crystal Parameters

..................................................................................... 70

List of Tables

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