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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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TMS320VC5507 датащи(PDF) 83 Page - Texas Instruments |
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TMS320VC5507 датащи(HTML) 83 Page - Texas Instruments |
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83 / 108 page  G3 G1 G2 CLKOUT † IOx Input Mode IOx Output Mode † CLKOUT reflects the CPU clock. SM320VC5507-EP www.ti.com SPRS613 – SEPTEMBER 2009 5.12 General-Purpose Input/Output (GPIOx) Timings Table 5-19 and Table 5-20 assume testing over recommended operating conditions (see Figure 5-21). Table 5-19. GPIO Pins Configured as Inputs Timing Requirements CVDD = 1.2 V CVDD = 1.6 V CVDD = 1.35 V NO. UNIT MIN MAX MIN MAX GPIO 4 4 Setup time, IOx input valid G1 tsu (GPIO–COH) AGPIO(1) 8 8 ns before CLKOUT high EHPIGPIO(2) 8 8 GPIO 0 0 Hold time, IOx input valid G2 th (COH–GPIO) AGPIO(1) 0 0 ns after CLKOUT high EHPIGPIO(2) 0 0 (1) AGPIO pins: A[15:0] (2) EHPIGPIO pins: C13, C10, C7, C5, C4, and C0 Table 5-20. GPIO Pins Configured as Outputs Switching Characteristics CVDD = 1.2 V CVDD = 1.6 V CVDD = 1.35 V NO. UNIT MIN MAX MIN MAX GPIO 0 6 0 6 Delay time, CLKOUT high G3 td (COH–GPIO) AGPIO(1) 0 11 0 11 ns to IOx output change EHPIGPIO(2) 0 13 0 13 (1) AGPIO pins: A[15:0] (2) EHPIGPIO pins: C13, C10, C7, C5, C4, and C0 Figure 5-21. General-Purpose Input/Output (IOx) Signal Timings Copyright © 2009, Texas Instruments Incorporated Electrical Specifications 83 Submit Documentation Feedback Product Folder Link(s): SM320VC5507-EP |
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