TMS320VC5507 datasheet(79/108 Pages) TI1

номер детали	TMS320VC5507

подробное описание детали	Fixed-Point Digital Signal Processor

PDF	108 Pages

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производитель	TI1 [Texas Instruments]

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Enter Self-Refresh

M38

M39

M22

M23

M36

M28

CLKMEM

CKE

(XF or GPIO4)

CEx

SDRAS

SDCAS

SDWE

SDA10

Exit Self-Refresh

CLKOUT

CVDD

DVDD

RESET

SM320VC5507-EP

www.ti.com

SPRS613 – SEPTEMBER 2009

Figure 5-14. SDRAM Self-Refresh Command

5.8

Reset Timings

5.8.1

Power-Up Reset (On-Chip Oscillator Active)

Table 5-11 assumes testing over recommended operating conditions (see Figure 5-15).

Table 5-11. Power-Up Reset (On-Chip Oscillator Active) Timing Requirements

CVDD = 1.2 V

CVDD = 1.6 V

CVDD = 1.35 V

NO.

UNIT

MIN

MAX

MIN

MAX

th (SUPSTBL-RSTL)

Hold time, RESET low after oscillator stable(1)

3P(2)

(1)

Oscillator stable time depends on the crystal characteristic (i.e., frequency, ESR, etc.) which varies from one crystal manufacturer to

another. Based on the crystal characteristics, the oscillator stable time can be in the range of a few to 10s of ms. A reset circuit with

100-ms or more delay time will ensure the oscillator stabilized before the RESET goes high.

(2)

P = 1/(input clock frequency) in ns. For example, when input clock is 12 MHz, P = 83.33 ns.

Figure 5-15. Power-Up Reset (On-Chip Oscillator Active) Timings

Electrical Specifications

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Product Folder Link(s): SM320VC5507-EP

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