TMS320VC5507 datasheet(15/108 Pages) TI1

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SM320VC5507-EP

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SPRS613 – SEPTEMBER 2009

Table 2-2. Signal Descriptions (continued)

TERMINAL

MULTIPLEXED

RESET

I/O/Z (1)

FUNCTION

BK (2)

NAME

SIGNAL NAME

CONDITION

EMIF asynchronous memory write enable or HPI

read/write. This pin serves in one of two functions:

EMIF asynchronous memory write enable

GPIO0 = 1:

I/O/Z

(EMIF.AWE) or HPI read/write (HPI.HR/W). The

initial state of this pin depends on the GPIO0 pin.

Output,

See Section 3.6.1 for more information.

EMIF.AWE

Active-low EMIF asynchronous memory write

enable. EMIF.AWE is selected when the Parallel

EMIF.AWE

O/Z

Port Mode bit field of the External Bus Selection

GPIO0 = 0:

Input,

HPI read/write. HPI.HR/W is selected when the

HPI.HR/W

Parallel Port Mode bit field of the External Bus

HPI.HR/W

Selection Register is 10 or 11. HPI.HR/W controls

the direction of the HPI transfer.

EMIF data ready input or HPI ready output. This

pin serves in one of two functions: EMIF data

ready input (EMIF.ARDY) or HPI ready output

GPIO0 = 1:

I/O/Z

(HPI.HRDY). The initial state of this pin depends

on the GPIO0 pin. See Section 3.6.1 for more

Input,

information.

EMIF.ARDY

EMIF data ready input. Used to insert wait states

for slow memories. EMIF.ARDY is selected when

EMIF.ARDY

the Parallel Port Mode bit field of the External Bus

GPIO0 = 0:

Selection Register is 00 or 01. When this pin is

used as ARDY, an external 2.2 k

Ω

Output,

HPI.HRDY

HPI ready output. HPI.HRDY is selected when the

HPI.HRDY

Parallel Port Mode bit field of the External Bus

Selection Register is 10 or 11.

EMIF chip select for memory space CE0 or

general-purpose IO9. This pin serves in one of

GPIO0 = 1:

two functions: EMIF chip select for memory space

I/O/Z

CE0 (EMIF.CE0) or general-purpose IO9 (GPIO9).

Output,

The initial state of this pin depends on the GPIO0

EMIF.CE0

pin. See Section 3.6.1 for more information.

Active-low EMIF chip select for memory space

CE0. EMIF.CE0 is selected when the Parallel Port

EMIF.CE0

O/Z

GPIO0 = 0:

Mode bit field of the External Bus Selection

Input,

General-purpose IO9. GPIO9 is selected when the

GPIO9

I/O/Z

Parallel Port Mode bit field of the External Bus

Selection Register is set to 10 or 11.

EMIF chip select for memory space CE1 or

general-purpose IO10. This pin serves in one of

two functions: EMIF chip-select for memory space

GPIO0 = 1:

I/O/Z

CE1 (EMIF.CE1) or general-purpose IO10

(GPIO10). The initial state of this pin depends on

Output,

the GPIO0 pin. See Section 3.6.1 for more

EMIF.CE1

information.

Active-low EMIF chip select for memory space

CE1. EMIF.CE1 is selected when the Parallel Port

GPIO0 = 0:

EMIF.CE1

O/Z

Mode bit field of the External Bus Selection

Input,

GPIO10

General-purpose IO10. GPIO10 is selected when

GPIO10

I/O/Z

the Parallel Port Mode bit field of the External Bus

Selection Register is set to 10 or 11.

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