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TMS320VC5507 датащи(PDF) 52 Page - Texas Instruments |
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TMS320VC5507 датащи(HTML) 52 Page - Texas Instruments |
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52 / 108 page ![]() SM320VC5507-EP SPRS613 – SEPTEMBER 2009 www.ti.com Table 3-33. USB Module Registers (continued) 0x67FC USBCTL USB control register xxxx xxxx 0101 0000 0x67FD USBMSK USB interrupt mask register xxxx xxxx 0000 0000 0x67FE USBSTA USB status register xxxx xxxx 0000 0000 0x67FF FUNADR Function address register xxxx xxxx x000 0000 0x7000 USBIDLECTL USB idle control and status register xxxx xxxx xxxx x000 Table 3-34. Analog-to-Digital Controller (ADC) Registers WORD ADDRESS REGISTER NAME DESCRIPTION RESET VALUE (1) 0x6800 ADCCTL[15:11] ADC control register 0111 0000 0000 0000 0x6801 ADCDATA[15:0] ADC data register 0111 0000 0000 0000 0x6802 ADCCLKDIV[15:0] ADC function clock divider register 0000 0000 0000 1111 0x6803 ADCCLKCTL[8:0] ADC clock control register 0000 0000 0000 0111 (1) Hardware reset; x denotes a “don’t care.” Table 3-35. External Bus Selection Register WORD ADDRESS REGISTER NAME DESCRIPTION RESET VALUE(1) 0x6C00 EBSR[15:0] External bus selection register 0000 0000 0000 0011(2) (1) Hardware reset; x denotes a “don’t care.” (2) The reset value is 0000 0000 0000 0001 if GPIO0 = 1; the value is 0000 0000 0000 0011 if GPIO0 = 0. 3.12 Interrupts Vector-relative locations and priorities for all internal and external interrupts are shown in Table 3-36. Table 3-36. Interrupt Table SOFTWARE RELATIVE NAME (TRAP) LOCATION (1) PRIORITY FUNCTION EQUIVALENT (HEX BYTES) RESET SINT0 0 0 Reset (hardware and software) NMI(2) SINT1 8 1 Nonmaskable interrupt BERR SINT24 C0 2 Bus error interrupt INT0 SINT2 10 3 External interrupt #0 INT1 SINT16 80 4 External interrupt #1 INT2 SINT3 18 5 External interrupt #2 TINT0 SINT4 20 6 Timer #0 interrupt RINT0 SINT5 28 7 McBSP #0 receive interrupt XINT0 SINT17 88 8 McBSP #0 transmit interrupt RINT1 SINT6 30 9 McBSP #1 receive interrupt XINT1 SINT7 38 10 McBSP #1 transmit interrupt USB SINT8 40 11 USB interrupt DMAC0 SINT18 90 12 DMA channel #0 interrupt DMAC1 SINT9 48 13 DMA channel #1 interrupt DSPINT SINT10 50 14 Interrupt from host INT3/WDTINT SINT11 58 15 External interrupt #3 or watchdog timer interrupt (1) Absolute addresses of the interrupt vector locations are determined by the contents of the IVPD and IVPH registers. Interrupt vectors for interrupts 0 −15 and 24−31 are relative to IVPD. Interrupt vectors for interrupts 16−23 are relative to IVPH. (2) The NMI pin is internally tied high. However, NMI interrupt vector can be used for SINT1 and Watchdog Timer Interrupt. 52 Functional Overview Copyright © 2009, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): SM320VC5507-EP |
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