TMS320VC5507 datasheet(37/108 Pages) TI1

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Reserved

CLKDIV

R/W

LEGEND: R = Read, W = Write, n = value after reset

SM320VC5507-EP

www.ti.com

SPRS613 – SEPTEMBER 2009

Table 3-14. EHPI GPIO Data Register (EHPIGPIODATA) Bit Functions

RESET

BIT NO.

BIT NAME

FUNCTION

VALUE

−6

Reserved

Data bits that are used to control the level of the EHPI Control Bus configured as I/O output pins, and

to monitor the level of the EHPI Control Bus configured as I/O input pins.

If GPIODIRn = 0, then:

GPIODx = 0;

Corresponding I/O pin is read as a low.

GPIOD13

−

−0

GPIOD8

GPIODx = 1;

Corresponding I/O pin is read as a high.

If GPIODIRn = 1, then:

GPIODx = 0;

Set corresponding I/O pin to low.

GPIODx = 1;

Set corresponding I/O pin to high.

3.8

System Register

The system register (SYSR) provides control over certain device-specific functions. The register is located

at port address 07FDh.

Figure 3-15. System Register Bit Locations

Table 3-15. System Register Bit Fields

BIT

FUNCTION

NUMBER

NAME

−3

Reserved

These bits are reserved and are unaffected by writes.

CLKOUT Divide Factor. Allows the clock present on the CLKOUT pin to be a

divided-down version of the internal CPU clock. This field does not affect the programming

of the PLL.

CLKDIV 000 = CLKOUT represents the CPU clock divided by 1

CLKDIV 001 = CLKOUT represents the CPU clock divided by 2

CLKDIV 010 = CLKOUT represents the CPU clock divided by 4

2-0

CLKDIV

CLKDIV 011 = CLKOUT represents the CPU clock divided by 6

CLKDIV 100 = CLKOUT represents the CPU clock divided by 8

CLKDIV 101 = CLKOUT represents the CPU clock divided by 10

CLKDIV 110 = CLKOUT represents the CPU clock divided by 12

CLKDIV 111 = CLKOUT represents the CPU clock divided by 14

Functional Overview

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