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MPC8540 датащи(PDF) 134 Page - Freescale Semiconductor, Inc |
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MPC8540 датащи(HTML) 134 Page - Freescale Semiconductor, Inc |
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134 / 1302 page ![]() MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1 2-16 Freescale Semiconductor Memory Map Figure 2-8. Device-Specific Register Mapping to Configuration, Control, and Status Memory Block 2.4 Complete CCSR Map Table 2-9 lists the MPC8540 memory-mapped registers. Table 2-9. Memory Map Offset Register Access Reset Section/Page Local-Access Registers—Configuration, Control, and Status Registers 0x0_0000 CCSRBAR—Configuration, control, and status registers base address register R/W 0x000F_F700 4.3.1.1.2/4-5 0x0_0008 ALTCBAR—Alternate configuration base address register R/W 0x0000_0000 4.3.1.2.1/4-6 0x0_0010 ALTCAR—Alternate configuration attribute register R/W 0x0000_0000 4.3.1.2.2/4-6 0x0_0020 BPTR—Boot page translation register R/W 0x0000_0000 4.3.1.3.1/4-8 Global Utilities 0xE 1000 Device-Specific 0xE 0000 0xE 2000 Registers 0xF FFFC Perf. Monitor Device-Specific Utilities 0xF FFFF 0xE 0000 0xC 0000 0x8 0000 0x4 0000 0x0 0000 Reserved PIC General Utilities Watchpoint/Debug RIO |
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