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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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MPC8540 датащи(PDF) 133 Page - Freescale Semiconductor, Inc |
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MPC8540 датащи(HTML) 133 Page - Freescale Semiconductor, Inc |
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133 / 1302 page  Configuration, Control, and Status Register Map MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1 Freescale Semiconductor 2-15 2.3.5 RapidIO and CCSR The RapidIO module uses 128 Kbytes of CCSR memory; refer to Figure 2-7. All registers are 32-bits wide and should only be accessed with 32-bit accesses. The 4-Kbyte RapidIO implementation block has the same internal organization as those defined for the general utilities described above. Figure 2-7. RapidIO Mapping to Configuration, Control, and Status Memory Block 2.3.6 Device-Specific Utilities The device-specific registers consist of power management, performance monitors, and device-wide debug utilities (refer to Figure 2-8). These registers are accessible with 32-bit accesses only. Transactions of other than 32-bit are considered a programming error and operation is undefined. Reserved bits in the following register descriptions are not guaranteed to have predictable values. Software must preserve the values of reserved bits when writing to a register. Also, when reading from a register, software should not rely on the value of any reserved bit remaining consistent. 0xC 0000 0xD 0000 0xD 1000 0xC 4100 0x0 0000 Device-Specific PIC 0xE 0000 0xF FFFF CCSR Register Memory Block 0x4 0000 0x8 0000 General Utilities Utilities 0xC 0000 Reserved RIO RapidIO Configuration RapidIO RapidIO Messaging RapidIO Impl. RapidIO Arch. Extended Features |
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