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MPC8540 датащи(PDF) 31 Page - Freescale Semiconductor, Inc

номер детали MPC8540
подробное описание детали  MPC8540 PowerQUICC III??Integrated Host Processor Reference Manual
PDF  1302 Pages
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производитель  FREESCALE [Freescale Semiconductor, Inc]
домашняя страница  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MPC8540 датащи(HTML) 31 Page - Freescale Semiconductor, Inc

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MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1
Freescale Semiconductor
xxxi
Contents
Paragraph
Number
Title
Page
Number
16.4.2.7.1
PCI Read Transactions .................................................................................... 16-62
16.4.2.7.2
PCI Write Transactions.................................................................................... 16-63
16.4.2.8
Transaction Termination ...................................................................................... 16-64
16.4.2.8.1
Master-Initiated Termination ........................................................................... 16-65
16.4.2.8.2
Target-Initiated Termination ............................................................................ 16-65
16.4.2.9
Fast Back-to-Back Transactions .......................................................................... 16-68
16.4.2.10
Dual Address Cycles............................................................................................ 16-68
16.4.2.11
Configuration Cycles ........................................................................................... 16-70
16.4.2.11.1
PCI Configuration Space Header .................................................................... 16-71
16.4.2.11.2
Accessing the PCI Configuration Space in Host Mode................................... 16-72
16.4.2.11.3
PCI Configuration in Agent and Agent Lock Modes ...................................... 16-74
16.4.2.11.4
PCI Type 0 Configuration Translation............................................................. 16-74
16.4.2.11.5
Type 1 Configuration Translation.................................................................... 16-76
16.4.2.12
Other Bus Transactions........................................................................................ 16-76
16.4.2.12.1
Interrupt-Acknowledge Transactions .............................................................. 16-76
16.4.2.12.2
Special-Cycle Transactions ............................................................................. 16-77
16.4.2.13
PCI Error Functions ............................................................................................. 16-78
16.4.2.13.1
PCI Parity ........................................................................................................ 16-78
16.4.2.13.2
Error Reporting................................................................................................ 16-79
16.4.3
PCI-X Bus Protocol ................................................................................................. 16-81
16.4.3.1
PCI-X Terminology ............................................................................................. 16-81
16.4.3.2
PCI-X Command Encodings ............................................................................... 16-82
16.4.3.3
PCI-X Attribute Phase ......................................................................................... 16-83
16.4.3.4
PCI-X Transactions.............................................................................................. 16-84
16.4.3.5
PCI-X Wait State and Termination Rules ............................................................ 16-88
16.4.3.6
PCI-X Split Transactions ..................................................................................... 16-89
16.4.3.6.1
Split Response ................................................................................................. 16-89
16.4.3.6.2
Completion Address ........................................................................................ 16-90
16.4.3.6.3
Completer Attributes ....................................................................................... 16-91
16.4.3.6.4
Split Completion Messages ............................................................................. 16-92
16.4.3.7
PCI-X Configuration Transactions ...................................................................... 16-93
16.4.3.8
PCI-X Error Functions......................................................................................... 16-96
16.4.3.8.1
Error Reporting................................................................................................ 16-96
16.5
Initialization/Application Information ......................................................................... 16-99
16.5.1
Power-On Reset Configuration Modes.................................................................... 16-99
16.5.1.1
Host Mode ......................................................................................................... 16-100
16.5.1.2
Agent Mode ....................................................................................................... 16-100
16.5.1.3
Agent Configuration Lock Mode....................................................................... 16-100
16.5.2
Nonposted Writes in PCI-X ................................................................................... 16-100
16.5.3
PCI-X Outbound Read Transaction Alignment ..................................................... 16-101



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