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MPC8540 датащи(PDF) 131 Page - Freescale Semiconductor, Inc |
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MPC8540 датащи(HTML) 131 Page - Freescale Semiconductor, Inc |
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131 / 1302 page ![]() Configuration, Control, and Status Register Map MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1 Freescale Semiconductor 2-13 2.3.3 General Utilities Registers Figure 2-5 provides an overview of the general utilities registers. Figure 2-5. General Utilities Registers Mapping to Configuration, Control, and Status Memory Block Figure 2-5 also shows the organization of registers inside the 4-Kbyte register space allocated to an individual functional block. The first 3 Kbytes are available for general registers. The next 512 bytes are dedicated to address translation and mapping registers, if applicable to that particular 0x0 0000 0x0 1000 0x0 3000 General Utilities Registers Memory Block 0x0 4000 0x0 0000 Device-Specific PIC 0xE 0000 0xF FFFF CCSR Memory Block 0x4 0000 0x8 0000 General 0x0 2000 Utilities 0x0 7000 0xn n000 General Utility Block 0xn nF00 Debug 0xn nE00 Error Mgmt General Registers Utilities 0x3 FFFF L2 Cache 0xn nC00 TSEC 1 TSEC 2 10_100 FEC 0x0 5000 0xC 0000 Reserved RIO 0x0 6000 ECM I2C Memory Local Bus OCeaN DUART Local Access 0x0 8000 0x2 0000 0x2 1000 0x2 4000 0x2 5000 0x2 6000 DMA PCI ATMU |
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