MPC8540 datasheet(53/1302 Pages) FREESCALE

53 / 1302 page

MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1

Freescale Semiconductor

liii

Figures

Figure

Number

Title

Page

Number

14-69

Receive Oversize Packet Counter Register Definition ....................................................... 14-71

14-70

Receive Fragments Counter Register Definition ................................................................ 14-71

14-71

Receive Jabber Counter Register Definition....................................................................... 14-72

14-72

Receive Dropped Packet Counter Register Definition ....................................................... 14-72

14-73

Transmit Byte Counter Register Definition ........................................................................ 14-73

14-74

Transmit Packet Counter Register Definition ..................................................................... 14-73

14-75

Transmit Multicast Packet Counter Register Definition ..................................................... 14-74

14-76

Transmit Broadcast Packet Counter Register Definition .................................................... 14-74

14-77

Transmit Pause Control Frame Counter Register Definition .............................................. 14-75

14-78

Transmit Deferral Packet Counter Register Definition....................................................... 14-75

14-79

Transmit Excessive Deferral Packet Counter Register Definition...................................... 14-76

14-80

Transmit Single Collision Packet Counter Register Definition .......................................... 14-76

14-81

Transmit Multiple Collision Packet Counter Register Definition....................................... 14-77

14-82

Transmit Late Collision Packet Counter Register Definition ............................................. 14-77

14-83

Transmit Excessive Collision Packet Counter Register Definition .................................... 14-78

14-84

Transmit Total Collision Counter Register Definition ........................................................ 14-78

14-85

Transmit Drop Frame Counter Register Definition ............................................................ 14-79

14-86

Transmit Jabber Frame Counter Register Definition .......................................................... 14-79

14-87

Transmit FCS Error Counter Register Definition ............................................................... 14-80

14-88

Transmit Control Frame Counter Register Definition ........................................................ 14-80

14-89

Transmit Oversized Frame Counter Register Definition .................................................... 14-81

14-90

Transmit Undersize Frame Counter Register Definition .................................................... 14-81

14-91

Transmit Fragment Counter Register Definition ................................................................ 14-82

14-92

Carry Register 1 (CAR1) Register Definition..................................................................... 14-82

14-93

Carry Register 2 (CAR2) Register Definition..................................................................... 14-84

14-94

Carry Mask Register 1 (CAM1) Register Definition.......................................................... 14-85

14-95

Carry Mask Register 2 (CAM2) Register Definition.......................................................... 14-86

14-96

IADDRn Register Definition .............................................................................................. 14-88

14-97

GADDRn Register Definition............................................................................................. 14-88

14-98

ATTR Register Definition ................................................................................................... 14-89

14-99

ATTRELI Register Definition............................................................................................. 14-90

14-100

Control Register Definition................................................................................................. 14-92

14-101

Status Register Definition ................................................................................................... 14-93

14-102

AN Advertisement Register Definition............................................................................... 14-94

14-103

AN Link Partner Base Page Ability Register Definition .................................................... 14-96

14-104

AN Expansion Register Definition ..................................................................................... 14-98

14-105

AN Next Page Transmit Register Definition ...................................................................... 14-98

14-106

AN Link Partner Ability Next Page Register Definition .................................................... 14-99

14-107

Extended Status Register Definition ................................................................................. 14-100

14-108

Jitter Diagnostics Register Definition ............................................................................... 14-101

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