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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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MPC8540 датащи(PDF) 83 Page - Freescale Semiconductor, Inc |
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MPC8540 датащи(HTML) 83 Page - Freescale Semiconductor, Inc |
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83 / 1302 page  MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1 Freescale Semiconductor lxxxiii About This Book The primary objective of this reference manual is to define the functionality of the MPC8540. The MPC8540 integrates a PowerPC™ processor with system logic required for networking, storage, and general purpose embedded applications. The e500 processor core is a low-power implementation of the family of reduced instruction set computing (RISC) embedded processors that implement the Book E definition of the PowerPC architecture. This book is intended as a companion to the PowerPC e500 Core Complex Reference Manual. Audience It is assumed that the reader understands operating systems, microprocessor system design, and the basic principles of RISC processing. Organization Following is a summary and a brief description of the major parts of this reference manual: Part I, “Overview,” describes the many features of the MPC8540 integrated host processor at an overview level. The following chapters are included: • Chapter 1, “Overview,” provides a high-level description of features and functionality of the MPC8540 integrated host processor. It describes the MPC8540, its interfaces, and its programming model. The functional operation of the MPC8540 with emphasis on peripheral functions is also described. • Chapter 2, “Memory Map,” describes the memory map of the MPC8540. An overview of the local address map is followed by a description of how local access windows are used to define the local address map. The inbound and outbound address translation mechanisms used to map to and from external memory spaces are described next. Finally, the configuration, control, and status registers are described, including a complete listing of all memory-mapped registers with cross references to the sections detailing descriptions of each. • Chapter 3, “Signal Descriptions,” provides a listing of all the external signals, cross-references for signals that serve multiple functions, output signal states at reset, and reset configuration signals (and the modes they define). • Chapter 4, “Reset, Clocking, and Initialization,” describes the hard and soft resets, the power-on reset sequence, power-on reset (POR) configuration, clocking, and initialization of the MPC8540. |
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