MPC8540 datasheet(126/1302 Pages) FREESCALE

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MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1

2-8

Freescale Semiconductor

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before any devices try to use any of these windows. If the configuration is being done by the local

e500 processor, the read of LAWAR3 should be followed by an isync instruction.

2.2.3.6

Distinguishing Local Access Windows from Other Mapping

Functions

It is important to distinguish between the mapping function performed by the local access

windows and the additional mapping functions that happen at the target interface. The local access

windows define how a transaction is routed through the MPC8540 internal interconnects from the

transactions source to its target. After the transaction has arrived at its target interface, that

interface controller may perform additional mapping. For instance, the DDR SDRAM controller

has chip select registers that map a memory request to a particular external device. Similarly, the

local bus controller has base registers that perform a similar function. The RapidIO and PCI

interfaces have outbound address translation and mapping units that map the local address into an

external address space.

These other mapping functions are configured by programming the configuration, control, and

status registers of the individual interfaces. Note that there is no need to have a one-to-one

correspondence between local access windows and chip select regions or outbound ATMU

windows. A single local access window can be further decoded to any number of chip selects or

to any number or outbound ATMU windows at the target interface.

2.2.3.7

Illegal Interaction Between Local Access Windows and DDR

SDRAM Chip Selects

If a local access window maps an address to an interface other than the DDR SDRAM controller,

then there should not be a valid chip select configured for the same address in the DDR SDRAM

controller. Because DDR SDRAM chip selects boundaries are defined by a beginning and ending

address, it is easy to define them so that they do not overlap with local access windows that map

to other interfaces.

2.2.4

Outbound Address Translation and Mapping Windows

Outbound address translation and mapping refers to the translation of addresses from the local

32-bit address space to the external address space and attributes of a particular I/O interface. On

the MPC8540, both the RapidIO and the PCI/PCI-X blocks have outbound address translation and

mapping units (ATMUs).

The RapidIO controller has eight outbound ATMU windows plus a default window. If a

transaction’s address does not hit any of the eight outbound ATMU windows, the translation

actions defined by the default window are used. The default window is always enabled. See

Section 17.3.2.2, “ATMU Registers,” for a detailed description of the RapidIO outbound ATMU

windows.

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