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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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MPC8540 датащи(PDF) 124 Page - Freescale Semiconductor, Inc |
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MPC8540 датащи(HTML) 124 Page - Freescale Semiconductor, Inc |
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124 / 1302 page  MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1 2-6 Freescale Semiconductor Memory Map 2.2.3.2 Local Access Window n Base Address Registers (LAWBAR0–LAWBAR7) Figure 2-2 shows the bit fields of the LAWBARn registers. Figure 2-2. Local Access Window n Base Address Registers (LAWBAR0–LAWBAR7) Table 2-5 describes LAWBARn field descriptions. 2.2.3.3 Local Access Window n Attributes Registers (LAWAR0–LAWAR7) Figure 2-3 shows the bit fields of the LAWARn registers. Figure 2-3. Local Access Window n Attributes Registers (LAWAR0–LAWAR7) Table 2-6 describes LAWARn field descriptions. 011 12 31 R 0 0 0 000 00 0 0 0 0 BASE_ADDR W Reset 0000_0000_0000_0000_0000_0000_0000_0000 Offset 0xC08, 0xC28, 0xC48, 0xC68, 0xC88, 0xCA8, 0xCC8, 0xCE8 Table 2-5. LAWBARn Field Descriptions Bits Name Description 0–11 — Write reserved, read = 0 12–31 BASE_ADDR Identifies the 20 most-significant address bits of the base of local access window n. The specified base address should be aligned to the window size, as defined by LAWARn[SIZE]. 0 1 7 8 11 12 25 26 31 R E N 0 0 00000 TRGT_IF 0 000 0000000000 SIZE W Reset 0000_0000_0000_0000_0000_0000_0000_0000 Offset 0xC10, 0xC30, 0xC50, 0xC70, 0xC90, 0xCB0, 0xCD0, 0xCF0 Table 2-6. LAWARn Field Descriptions Bits Name Description 0 EN 0 The local access window n (and all other LAWARn and LAWBARn fields) are disabled. 1 The local access window n is enabled and other LAWARn and LAWBARn fields combine to identify an address range for this window. 1–7 — Write reserved, read = 0 |
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