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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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MPC8540 датащи(PDF) 120 Page - Freescale Semiconductor, Inc |
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MPC8540 датащи(HTML) 120 Page - Freescale Semiconductor, Inc |
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120 / 1302 page  MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1 2-2 Freescale Semiconductor Memory Map Figure 2-1 shows an example memory map. Figure 2-1. Local Memory Map Example Table 2-2 shows one corresponding set of local access window settings. In this example, it is not necessary to use a local access window to specify the location of the boot ROM because it is in the default location at the highest 8 Mbytes of memory (see Section 4.4.3.3, “Boot ROM Location”). Neither is it required to define a local access window to describe the range of memory used for memory-mapped registers because this is a fixed 1-Mbyte space pointed to by CCSRBAR. See Section 4.3.1.1.2, “Configuration, Control, and Status Base Address Register Table 2-2. Local Access Windows Example Window Base Address Size Target Interface 0 0x0000_0000 2 Gbytes 0b1111 (DDR SDRAM) 1 0x8000_0000 1 Mbyte 0b0100 (local bus) 2 0xA000_0000 256 Mbytes 0b0000 (PCI/PCI-X) 3 0xB000_0000 256 Mbytes 0b1100 (RapidIO) 4 0xC000_0000 256 Mbytes 0b0100 (local bus) 5–7 Unused Example Local 0 0xFFFF_FFFF 0xA000_000 Memory Map Memory I/O 0xA000_0000 0xB000_0000 PCI-X 0xC000_0000 RapidIO CCSR Boot ROM 0x8000_000 Local Bus SRAM DDR SDRAM Local Bus Flash Configuration Registers Local Bus DSP |
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