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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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MPC8540 датащи(PDF) 153 Page - Freescale Semiconductor, Inc |
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MPC8540 датащи(HTML) 153 Page - Freescale Semiconductor, Inc |
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153 / 1302 page  Complete CCSR Map MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1 Freescale Semiconductor 2-35 FEC Hash Function Registers 0x2_6800 IADDR0—Individual address register 0 R/W 0x0000_0000 21.5.3.7.1/21-45 0x2_6804 IADDR1—Individual address register 1 R/W 0x0000_0000 0x2_6808 IADDR2—Individual address register 2 R/W 0x0000_0000 0x2_680C IADDR3—Individual address register 3 R/W 0x0000_0000 0x2_6810 IADDR4—Individual address register 4 R/W 0x0000_0000 0x2_6814 IADDR5—Individual address register 5 R/W 0x0000_0000 0x2_6818 IADDR6—Individual address register 6 R/W 0x0000_0000 0x2_681C IADDR7—Individual address register 7 R/W 0x0000_0000 0x2_6820– 0x2_687C Reserved R 0x0000_0000 — 0x2_6880 GADDR0—Group address register 0 R/W 0x0000_0000 21.5.3.7.2/21-46 0x2_6884 GADDR1—Group address register 1 R/W 0x0000_0000 0x2_6888 GADDR2—Group address register 2 R/W 0x0000_0000 0x2_688C GADDR3—Group address register 3 R/W 0x0000_0000 0x2_6890 GADDR4—Group address register 4 R/W 0x0000_0000 0x2_6894 GADDR5—Group address register 5 R/W 0x0000_0000 0x2_6898 GADDR6—Group address register 6 R/W 0x0000_0000 0x2_689C GADDR7—Group address register 7 R/W 0x0000_0000 0x2_68A0– 0x2_6BF4 Reserved R 0x0000_0000 — FEC Attribute Registers 0x2_6BF8 ATTR—Attribute register R/W 0x0000_0000 21.5.3.8.1/21-46 0x2_6BFC ATTRELI—Attribute EL & EI register R/W 0x0000_0000 21.5.3.8.2/21-47 FEC Future Expansion Space 0x2_6C00– 0x2_6FFC Reserved R 0x0000_0000 — PIC Register Address Map—Global Registers 0x4_0000– 0x4_0030 Reserved — — — 0x4_0040 IPIDR0—Interprocessor interrupt 0 (IPI 0) dispatch register W 0x0000_0000 10.3.7.1/10-39 0x4_0050 IPIDR1—IPI 1 dispatch register 0x4_0060 IPIDR2—IPI 2 dispatch register 0x4_0070 IPIDR3—IPI 3 dispatch register 0x4_0080 CTPR—Current task priority register R/W 0x0000_000F 10.3.7.2/10-40 Table 2-9. Memory Map (continued) Offset Register Access Reset Section/Page |
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