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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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MPC8540 датащи(PDF) 150 Page - Freescale Semiconductor, Inc |
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MPC8540 датащи(HTML) 150 Page - Freescale Semiconductor, Inc |
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150 / 1302 page  MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1 2-32 Freescale Semiconductor Memory Map 0x2_4734 CAR2—Carry register two register R/W 0x0000_0000 14.5.3.7.45/14-84 0x2_4738 CAM1—Carry register one mask register R/W 0xFE01_FFFF 14.5.3.7.46/14-85 0x2_473C CAM2—Carry register two mask register R/W 0x000F_FFFF 14.5.3.7.47/14-86 0x2_4740– 0x2_47FC Reserved R 0x0000_0000 — TSEC1 Hash Function Registers 0x2_4800 IADDR0—Individual address register 0 R/W 0x0000_0000 14.5.3.8.1/14-88 0x2_4804 IADDR1—Individual address register 1 R/W 0x0000_0000 0x2_4808 IADDR2—Individual address register 2 R/W 0x0000_0000 0x2_480C IADDR3—Individual address register 3 R/W 0x0000_0000 0x2_4810 IADDR4—Individual address register 4 R/W 0x0000_0000 0x2_4814 IADDR5—Individual address register 5 R/W 0x0000_0000 0x2_4818 IADDR6—Individual address register 6 R/W 0x0000_0000 0x2_481C IADDR7—Individual address register 7 R/W 0x0000_0000 0x2_4820– 0x2_487C Reserved R 0x0000_0000 — 0x2_4880 GADDR0—Group address register 0 R/W 0x0000_0000 14.5.3.8.2/14-88 0x2_4884 GADDR1—Group address register 1 R/W 0x0000_0000 0x2_4888 GADDR2—Group address register 2 R/W 0x0000_0000 0x2_488C GADDR3—Group address register 3 R/W 0x0000_0000 0x2_4890 GADDR4—Group address register 4 R/W 0x0000_0000 0x2_4894 GADDR5—Group address register 5 R/W 0x0000_0000 0x2_4898 GADDR6—Group address register 6 R/W 0x0000_0000 0x2_489C GADDR7—Group address register 7 R/W 0x0000_0000 0x2_48A0– 0x2_4BF4 Reserved R 0x0000_0000 — TSEC1 Attribute Registers 0x2_4BF8 ATTR—Attribute register R/W 0x0000_0000 14.5.3.9.1/14-89 0x2_4BFC ATTRELI—Attribute EL & EI register R/W 0x0000_0000 14.5.3.9.2/14-90 0x2_48A0– 0x2_4AFC Reserved R 0x0000_0000 — TSEC1 Future Expansion Space 0x2_4C00– 0x2_4FFC Reserved R 0x0000_0000 — 0x2_5000– 0x2_5FFC TSEC2 registers2 FEC General Control and Status Registers Table 2-9. Memory Map (continued) Offset Register Access Reset Section/Page |
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