MPC8540 datasheet(176/1302 Pages) FREESCALE

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MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1

3-8

Freescale Semiconductor

Signal Descriptions

LGPL4/LGTA/

LUPWAIT/LPBSE

LBC GP line 4/GPCM

terminate access/UPM

wait/parity byte select

LBC

—

I/O

13-1/13-5

LGPL5

LBC GP line 5 address

LBC

cfg_boot_seq1

13-1/13-5

LCKE

LBC clock enable

LBC

—

13-1/13-5

LCLK[0:2]

LBC clock

LBC

—

13-1/13-5

LSYNC_IN,

LSYNC_OUT

LBC DLL synchronization

LBC

—

I/O

13-1/13-5

DMA_DREQ[0:1]

DMA request 0–1

DMA

—

15-3/15-6

DMA_DREQ2

DMA request 2

DMA

LCS5

15-3/15-6

DMA_DREQ3

DMA request 3

DMA

IRQ9

15-3/15-6

DMA_DACK[0:1]

DMA acknowledge 0–1

DMA

—

15-3/15-6

DMA_DACK2

DMA acknowledge 2

DMA

LCS6

15-3/15-6

DMA_DACK3

DMA acknowledge 3

DMA

IRQ10

15-3/15-6

DMA_DDONE[0:1]

DMA done 0–1

DMA

—

15-3/15-6

DMA_DDONE2

DMA done 2

DMA

LCS7

15-3/15-6

DMA_DDONE3

DMA done 3

DMA

IRQ11

15-3/15-6

MCP

Machine check processor

PIC

—

10-6/10-8

UDE

Unconditional debug

event

PIC

—

10-6/10-8

IRQ[0:8]

External interrupt 0–8

PIC

—

10-6/10-8

IRQ9

External interrupt 9

PIC

DMA_DREQ3

10-6/10-8

IRQ10

External interrupt 10

PIC

DMA_DACK3

10-6/10-8

IRQ11

External interrupt 11

PIC

DMA_DDONE3

10-6/10-8

IRQ_OUT

Interrupt output

PIC

—

10-6/10-8

UART_SIN[0:1]

DUART serial data in

Dual UART

—

12-2/12-4

UART_SOUT[0:1]

DUART serial data out

Dual UART

—

12-2/12-4

UART_CTS[0:1]

DUART clear to send

Dual UART

—

12-2/12-4

UART_RTS[0:1]

DUART ready to send

Dual UART

—

12-2/12-4

IIC_SDA

I2C serial data

I2C—

I/O

11-2/11-4

IIC_SCL

I2C serial clock

I2C—

I/O

11-2/11-4

HRESET

Hard reset

System control

—

4-2/4-2

HRESET_REQ

Hard reset request

System control

—

4-2/4-2

Table 3-1. MPC8540 Signal Reference by Functional Block (continued)

Name

Description

Functional

Block

Alternate

Function(s)

No. of

Signals

I/O

Table/

Page

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