CP3SP33SMSSLASHNOPB datasheet(10/407 Pages) TI1

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CP3SP33

SNOSCW5 – MAY 2013

www.ti.com

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Allow any differential channel pair to be selected at one time. The A/D Converter performs the specific

differential conversion requested and stops.

In both single-ended and differential modes, there is the capability to connect the analog multiplexer

output and A/D converter input to external pins. This provides the ability to externally connect a common

filter/signal conditioning circuit for the A/D Converter.

3.14 Quad UART

Four UART modules support a wide range of programmable baud rates and data formats, parity

generation, and several error detection schemes. The baud rate is generated on-chip, under software

control. All UART modules support DMA and hardware flow control. One module has USART capability

(synchronous mode). The maximum speed is 3.072 Mbaud in either synchronous or asynchronous mode.

The UARTs offer a wake-up condition from the low-power modes using the Multi-Input Wake-Up module.

3.15 Microwire/SPI

The two Microwire/SPI (MWSPI) interface modules support synchronous serial communications with other

devices that conform to Microwire or Serial Peripheral Interface (SPI) specifications. It supports 8-bit and

16-bit data transfers. The maximum bus clock frequency is 12 MHz.

The Microwire interfaces allows several devices to communicate over a single system consisting of four

wires: serial in, serial out, shift clock, and slave enable. At any given time, the Microwire interfaces operate

as a master or a slave. The Microwire interfaces supports the full set of slave select for multi-slave

implementation.

In master mode, the shift clock is generated on-chip under software control. In slave mode, a wake-up out

of a low-power mode may be triggered using the Multi-Input WakeUp module.

3.16 Dual ACCESS.BUS Interface

The two ACCESS.bus (ACB) interface modules support a two-wire serial interface compatible with the

ACCESS.bus physical layer. It is also compatible with Intel’s System Management Bus (SMBus) and

Philips’ I2C bus. The ACB modules can be configured as a bus master or slave, and they can maintain

bidirectional communications with both multiple master and slave devices. The maximum bus clock

frequency is 400 kHz (Fast-mode).

The ACCESS.bus receivers can trigger a wake-up condition out of the low-power modes through the

Multi-Input Wake-Up module.

3.17 Dual Multi-Function Timer

The two Multi-Function Timer (MFT) modules each contain a pair of 16-bit timer/counter registers. Each

timer/counter unit can be configured to operate in any of the following modes:

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Processor-Independent Pulse Width Modulation (PWM) mode: Generates pulses of a specified width

and duty cycle and provides a general-purpose timer/ counter.

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Dual Input Capture mode: Measures the elapsed time between occurrences of external event and

provides a general-purpose timer/counter.

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Dual Independent Timer mode: Generates system timing signals or counts occurrences of external

events.

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Single Input Capture and Single Timer mode: Provides one external event counter and one system

timer.

Device Overview

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