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CP3SP33SMS/NOPB датащи(PDF) 1 Page - Texas Instruments

номер детали CP3SP33SMS/NOPB
подробное описание детали  Connectivity Processor with Cache, DSP, and Bluetooth짰, USB, and Dual CAN Interfaces
PDF  407 Pages
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производитель  TI1 [Texas Instruments]
домашняя страница  http://www.ti.com
Logo TI1 - Texas Instruments

CP3SP33SMS/NOPB датащи(HTML) 1 Page - Texas Instruments

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CP3SP33
www.ti.com
SNOSCW5 – MAY 2013
Connectivity Processor with Cache, DSP, and Bluetooth®, USB, and Dual CAN Interfaces
Check for Samples: CP3SP33
1
Introduction
1.1
Features
123
– Two ACCESS.bus serial bus interfaces (I2C
• CPU Features
compatible)
– Fully static RISC processor core, capable of
– Two 8/16-bit SPI, Microwire/Plus serial
operating from 0 to 96 MHz with zero
interfaces
wait/hold state
– I2S digital audio bus interface
– Minimum 10.4 ns instruction cycle time with
a 96-MHz internal clock frequency, based on
– Four Universal Asynchronous
a 12-MHz external input
Receiver/Transmitter (UART) channels, one
channel has USART capability
– 4K-byte, 4-way set-associative instruction
cache
– Advanced Audio Interface (AAI) to connect
to external 8/ 13-bit PCM Codecs as well as
– 69 independently vectored peripheral
to ISDN-Controllers through the IOM-2
interrupts
interface (slave only)
• DSP Features
– Two CVSD/PCM converters, for supporting
– Capable of operating up to 96 MHz
two bidirectional audio connectionsM
– 16-bit fixed-point arithmetic, dual-MAC
• External Bus Interface Shared Between CPU
architecture
and DSP
– 32-bit interface to 4K-byte RAM shared with
– 16/32-bit data busbus interface
CPU
– 23-bit address bus
– 32-bit external bus interface
– 3 programmable chip select outputs
– Bus master interface to audio peripherals
– Up to 96M bytes external memory
and I/O
– 8-level write buffer
• Memory
• General-Purpose Hardware Peripherals
– 4K bytes CPU instruction cache
– 10-channel, 10-bit A/D Converter (ADC)
– 32K bytes CPU data RAM
– 16-channel DMA controller
– 4K bytes CPU/DSP shared RAM
– Dual 16-bit Multi-Function Timer (MFT)
– 24K bytes DSP program RAM
– Dual Versatile Timer Units (VTU), each with
– 24K bytes DSP data RAM
four independent timers
– 8K bytes Bluetooth® sequencer and data
– Timing and Watchdog Unit
RAM
• Extensive Power and Clock Management
– Addresses up to 96M bytes (FBGA-224
Support
package) or 8M bytes (FBGA-144 package) of
external memory
– Two Phase Locked Loops (PLL) for
synthesizing independent system and audio
• Broad Range of Hardware Communications
peripheral clocks
Peripherals
– Two independent oscillators for Active mode
– Bluetooth Lower Link Controller (LLC)
(12 MHz) and Power Save mode (32.768 kHz)
including a shared 7K byte Bluetooth data
clocks
RAM and 1K byte Bluetooth Sequencer RAM
– Low-power modes (Power Save, Idle, and
– Universal Serial Bus (USB) 2.0 On-The-Go
Halt) for slowing or stopping clocks to
– Audio/telematics codec with dual ADC
optimize power consumption while meeting
inputs and high quality stereo DAC output
application needs
– Two CAN interfaces with 15 message buffers
conforming to CAN specification 2.0B active
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
Bluetooth is a registered trademark of Bluethooth SIG, Inc.
3
Teak is a registered trademark of ParthusCeva, Inc.
PRODUCTION DATA information is current as of publication date. Products conform to
Copyright © 2013, Texas Instruments Incorporated
specifications per the terms of the Texas Instruments standard warranty. Production
processing does not necessarily include testing of all parameters.


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