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CP3SP33SMS/NOPB датащи(PDF) 14 Page - Texas Instruments |
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CP3SP33SMS/NOPB датащи(HTML) 14 Page - Texas Instruments |
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14 / 407 page ![]() CP3SP33 SNOSCW5 – MAY 2013 www.ti.com Table 4-1. CP3SP33 Signal Descriptions ALTERNATE NAME PINS I/O PRIMARY FUNCTION I/O ALTERNATE FUNCTION NAME CLKIN 1 Input 12 MHz Clock Input RFCK Input RF Interface Clock X1CKI 1 Input 12 MHz Oscillator Input None None None X1CKO 1 Output 12 MHz Oscillator Output None None None X2CKI 1 Input 32 kHz Oscillator Input None None None X2CKO 1 Output 32 kHz Oscillator Output None None None RESET 1 Input Chip general reset None Input None Special mode select input with internal ENV0 1 Input TSTCLK0 Output Internal Clock Output pullup during reset Special mode select input with internal ENV1 1 Input TSTCLK1 Output Internal Clock Output pullup during reset VCC 4 Input Core Logic, 1.8V Power Supply None None None GND 4 Input Core Ground None None None IOVCC 12/6 Input I/O 3.3V Power Supply None None None IOGND 12/6 Input I/O Ground None None None PLLVCC 1 Input PLL 1.8V Power Supply None None None PLLGND 1 Input PLL Ground None None None ADVCC 1 Input ADC 1.8V Power Supply None None None ADGND 1 Input ADC Ground None None None TCDACVC 1 Input Codec 3.3V Power Supply None None None C TCDACGN 1 Input Codec 3.3V Ground None None None D TCADCVC 1 Input Codec 1.8V Power Supply None None None C TCADCGN 1 Input Codec 1.8V Ground None None None D RFVCC 1 Input RF Interface Power Supply None None None RFGND 1 Input RF Interface Ground None None None UVCC 1 Input USB 3.3V Transceiver Supply None None None UGND 1 Input USB 3.3V Transceiver Ground None None None CPU JTAG Test Mode Select (with internal TMS 1 Input None None None weak pullup) CPU JTAG Test Clock Input (with internal TCK 1 Input None None None weak pullup) CPU JTAG Test Data Input (with internal TDI 1 Input None None None weak pullup) TDO 1 Output CPU JTAG Test Data Output None None None RDY 1 Output NEXUS Ready Output None None None MCKO 1/0 Output NEXUS Trace Clock Output None None None MSEO 1/0 Output NEXUS Trace End of Message Output None None None DSP JTAG Test Mode Select (with internal DSPTMS 1/0 Input MDO0 Output NEXUS Trace Data Output weak pullup) DSP JTAG Test Data Input (with internal DSPTDI 1/0 Input MDO1 Output NEXUS Trace Data Output weak pullup) DSPTDO 1/0 Output DSP JTAG Test Data Output MDO2 Output NEXUS Trace Data Output DSP JTAG Test Clock Input (with internal DSPTCK 1/0 Input MDO3 Output NEXUS Trace Data Output weak pullup) RFDATA 1 I/O RF Interface Data None None None RFCE 1 Output RF Interface Chip Enable None None None VBUS 1 Input USB VSENSE (5V tol.) None None None 14 Signal Descriptions Copyright © 2013, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links :CP3SP33 |
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