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CP3SP33SMS/NOPB датащи(PDF) 43 Page - Texas Instruments |
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CP3SP33SMS/NOPB датащи(HTML) 43 Page - Texas Instruments |
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43 / 407 page ![]() CP3SP33 www.ti.com SNOSCW5 – MAY 2013 15 5 4 3 2 1 0 Reserved DCH20 DCH19 DCH18 DCH17 DCH16 DCHn The DMA Controller Select bit controls which DMA controller receives the DMA request and returns the DMA acknowledge signal for the corresponding ASC DMA channel. 0 – CPU DMA controller is selected. 1 – DSP DMA controller is selected. 9.3.14 ASC DSP DMA Channel Select Register n (ASCDDMASELn) The ASCDDMASELn registers are 16-bit, read/write registers that provide 5-bit fields for specifying the ASC DMA channels (listed in Table 12) that activate the corresponding DSP DMA channels. Each ASCDDMASELn register provides fields for two DMA channels. ASCDDMASEL0 controls channels 0 and 1, ASCDDMASEL1 controls channels 2 and 3, ASCDDMASEL2 controls channels 4 and 5, and ASCDDMASEL3 controls channels 6 and 7. After reset, these registers are clear. 15 13M M12 8M M7 5M M4 0 Reserved DDMA(2n+1) Reserved DDMA(2n) DDMA The ASCDDMASELn registers are 16-bit, read/write registers that provide 5-bit fields for specifying the ASC DMA channels (listed in Table 9-4) that activate the corresponding DSP DMA channels. Each ASCDDMASELn register provides fields for two DMA channels. ASCDDMASEL0 controls channels 0 and 1, ASCDDMASEL1 controls channels 2 and 3, ASCDDMASEL2 controls channels 4 and 5, and ASCDDMASEL3 controls channels 6 and 7. After reset, these registers are clear. 9.3.15 ASC Interrupt Select Register (ASCINTSEL) The ASCINTSEL register is a 16-bit, read/write register that selects between the CPU and DSP interrupt controllers for the ASC interrupt channels (listed in Table 9-3). Clear bits select the CPU interrupt controller, and set bits select the DSP interrupt controller. After reset, this register is clear. 15 11M M10 0 Reserved ICH ICH The Interrupt Controller Select bit controls which interrupt controller receives the interrupt request from the corresponding ASC interrupt channel. 0 – CPU interrupt controller is selected. 1 – DSP interrupt controller is selected. Copyright © 2013, Texas Instruments Incorporated DSP and Audio Peripherals 43 Submit Documentation Feedback Product Folder Links :CP3SP33 |
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