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VSC8504-02 датащи(PDF) 122 Page - Microsemi Corporation

номер детали VSC8504-02
подробное описание детали  Quad-Port 10/100/1000BASE-T PHY with Synchronous Ethernet and QSGMII/SGMII MAC
PDF  131 Pages
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производитель  MICROSEMI [Microsemi Corporation]
домашняя страница  http://www.microsemi.com
Logo MICROSEMI - Microsemi Corporation

VSC8504-02 датащи(HTML) 122 Page - Microsemi Corporation

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Pin Descriptions
VMDS-10507 VSC8504-02 Datasheet Revision 4.2
111
6.3.6
SerDes Media Interface
The following table lists the SerDes media interface pins.
6.3.7
Serial Management Interface
The following table lists the serial management interface (SMI) pins. The SMI pins are referenced to
VDD25 and can be set to a 2.5 V power supply.
TDN_0
TDP_0
N16
N15
I, ADIFF
PHY0 QSGMII/SGMII/SerDes MAC transmitter input pair.
TDN_1
TDN_2
TDN_3
TDP_1
TDP_2
TDP_3
T13
T9
T5
R13
R9
R5
I, ADIFF
SGMII/SerDes MAC transmitter input pair.
Table 132 •
SerDes Media Interface Pins
Name
Pin Type
Description
FIBRIN_0
FIBRIN_1
FIBRIN_2
FIBRIN_3
T15
T11
T7
T3
I, ADIFF
SerDes media receiver input pair.
FIBRIP_0
FIBRIP_1
FIBRIP_2
FIBRIP_3
R15
R11
R7
R3
I, ADIFF
SerDes media receiver input pair.
FIBRON_0
FIBRON_1
FIBRON_2
FIBRON_3
T14
T10
T6
T2
O, ADIFF SerDes media transmitter output pair.
FIBROP_0
FIBROP_1
FIBROP_2
FIBROP_3
R14
R10
R6
R2
O, ADIFF SerDes media transmitter output pair.
Table 133 •
SMI Pins
Name
Pin
Type
Description
MDC
P2
I, PD, 3 V
Management data clock. A 0 MHz to 12.5 MHz reference input is
used to clock serial MDIO data into and out of the PHY.
MDINT
M2
I/O, OS, OD
Management interrupt signal. Upon reset the device will configure
these pins as active-low (open drain) or active-high (open source)
based on the polarity of an external 10 k
Ω resistor connection.
These pins can be tied together in a wired-OR configuration with
only a single pull-up or pull-down resistor.
Table 131 •
SerDes MAC Interface Pins (continued)
Name
Pin
Type
Description



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