VSC8504-02 datasheet(75/131 Pages) MICROSEMI

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Registers

VMDS-10507 VSC8504-02 Datasheet Revision 4.2

4.3.4

ActiPHY Control

feature. The following table shows the settings available.

Table 51 •

Extended PHY Control 3, Address 20E1 (0x14)

Bit

Name

Access Description

Default

Disable carrier extension R/W

1: Disable carrier extension in 1000BASE-T

copper links

14:13 ActiPHY sleep timer

R/W

Sticky bit.

00: 1 second

01: 2 seconds

10: 3 seconds

11: 4 seconds

12:11

ActiPHY wake-up timer

R/W

Sticky bit.

00: 160 ms

01: 400 ms

10: 800 ms

11: 2 seconds

Reserved

PHY address reversal

R/W

Sticky bit.

Reverse PHY address

Enabling causes physical PHY 0 to have

address of 3, PHY 1 address of 2, PHY 2

address of 1, and PHY 3 address of 0.

Changing this bit to 1 should initially be

done from PHY 0 and changing to 0 from

PHY3

1: Enabled

0: Disabled

Reserved

Valid only on PHY0

7:6

Media mode status

00: No media selected

01: Copper media selected

10: SerDes media selected

11: Reserved

Enable 10BASE-T no

preamble mode

R/W

Sticky bit.

1: 10BASE-T will assert RX_DV indication

when data is presented to the receiver even

without a preamble preceding it

Enable link speed

autodownshift feature

R/W

Sticky bit.

1: Enable auto link speed downshift from

1000BASE-T

3:2

Link speed auto downshift

control

R/W

Sticky bits.

00: Downshift after 2 failed 1000BASE-T

autonegotiation attempts

01: Downshift after 3 failed 1000BASE-T

autonegotiation attempts

10: Downshift after 4 failed 1000BASE-T

autonegotiation attempts

11: Downshift after 5 failed 1000BASE-T

autonegotiation attempts

Link speed auto downshift

status

0: No downshift

1: Downshift is required or has occurred

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