VSC8504-02 datasheet(72/131 Pages) MICROSEMI

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Registers

VMDS-10507 VSC8504-02 Datasheet Revision 4.2

Note: Bits 30.11:10 are active only in port 0 and affect the behavior of LEDs for all the ports.

4.2.28

Extended Page Access

To provide functionality beyond the IEEE 802.3-specified registers and main device registers, the

VSC8504-02 includes an extended set of registers that provide an additional 15 register spaces.

The register at address 31 controls the access to the extended registers for the VSC8504-02. Accessing

the GPIO page register space is similar to accessing the extended page registers. The following table

shows the settings available.

4.3

Extended Page 1 Registers

To access the extended page 1 registers (16E1–30E1), enable extended register access by writing

0x0001 to register 31. Writing 0x0000 to register 31 restores the main register access.

When extended page 1 register access is enabled, reads and writes to registers 16–30 affect the

extended registers 16E1–30E1 instead of those same registers in the IEEE-specified register space.

Registers 0–15 are not affected by the state of the extended page register access.

1LED1 combine

feature disable

R/W

Sticky bit

0: Combine enabled (link/activity,

duplex/collision)

1: Disable combination (link only, duplex only)

0LED0 combine

feature disable

R/W

Sticky bit

0: Combine enabled (link/activity,

duplex/collision)

1: Disable combination (link only, duplex only)

Table 46 •

Extended/GPIO Register Page Access, Address 31 (0x1F)

Bit

Name

Access Description

Default

15:0 Extended/GPIO page

R/W

0x0000: Register 16–30 accesses main register

space. Writing 0x0000 to register 31 restores the

main register access.

0x0001: Registers 16–30 access extended

0x0002: Registers 16–30 access extended

0x0003: Registers 16–30 access extended

0x0010: Registers 0–30 access GPIO register

space

0x0000

Table 47 •

Extended Registers Page 1 Space

Address

Name

16E1

SerDes Media Control

17E1

Reserved

18E1

Cu Media CRC good counter

19E1

Extended mode and SIGDET control

20E1

Extended PHY control 3 (ActiPHY)

21E1–22E1 Reserved

Table 45 •

LED Behavior, Address 30 (0x1E) (continued)

Bit

Name

Access Description

Default

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