VSC8504-02 datasheet(92/131 Pages) MICROSEMI

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Registers

VMDS-10507 VSC8504-02 Datasheet Revision 4.2

4.6.8

MAC Configuration and Fast Link

source PHY for the fast link failure indication. The following table shows the settings available for the

GPIO9/FASTLINK-FAIL pin.

4.6.9

Two-Wire Serial MUX Control 1

The following table shows the settings available to control the integrated two-wire serial MUX.

Contact your Microsemi representative for an initialization script that greatly simplifies the programming

of QSGMII transmit controls.

The “F” in the command has a bit representing each of the four PHYs. To exclude a PHY from the

configuration, set its bit to 0. For example, the configuration of PHY 3 and PHY 2 to 1000BASE-X would

be 1100 or a “C” and the command would be 0x8CC1.

Table 81 •

MAC Configuration and Fast Link Register, Address 19G (0x13)

Bit

Name

Access Description

Default

15:14 MAC configuration

R/W

Select MAC interface mode

00: SGMII

01: QSGMII

10: Reserved

11: Reserved

13:4

Reserved

3:0

Fast link failure port setting

R/W

Select fast link failure PHY source

0000: Port0

0001: Port1

0010: Port2

0011: Port3

1100–1111: Output disabled

0xF

Table 82 •

Two-Wire Serial MUX Control 1, Address 20G (0x14)

Bit

Name

Access Description

Default

15:9 Two-wire serial

device address

R/W

Top 7 bits of the 8-bit address sent out on the two

wire serial stream. The bottom bit is the

read/write signal, which is controlled by register

21G, bit 8. SFPs use 0xA0.

0xA0

8:6

Reserved

Reserved.

5:4

Two-wire serial SCL

clock frequency

R/W

00: 50 kHz

01: 100 kHz

10: 400 kHz

11: 2 MHz

Two-wire serial MUX

port 3 enable

R/W

1: Enabled.

0: Two-wire serial disabled. Becomes GPIO pin.

Two-wire serial MUX

port 2 enable

R/W

1: Enabled.

0: Two-wire serial disabled. Becomes GPIO pin.

Two-wire serial MUX

port 1 enable

R/W

1: Enabled.

0: Two-wire serial disabled. Becomes GPIO pin.

Two-wire serial MUX

port 0 enable

R/W

1: Enabled.

0: Two-wire serial disabled. Two-wire serial MUX

port 0 becomes GPIO pin if serial LED function is

enabled, regardless of the settings of this bit.

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