VSC8504-02 datasheet(28/131 Pages) MICROSEMI

28 / 131 page

Functional Descriptions

VMDS-10507 VSC8504-02 Datasheet Revision 4.2

Using LPI, the usage model for the link is to transmit data as fast as possible and then return to a low

power idle state. Energy is saved on the link by cycling between active and low power idle states. During

LPI, power is reduced by turning off unused circuits and using this method, energy use scales with

bandwidth utilization.

The VSC8504-02 uses LPI to optimize power dissipation in 100BASE-TX and 1000BASE-T modes of

operation. In addition, the IEEE 802.3az-2010 standard defines a 10BASE-Te mode that reduces

transmit signal amplitude from 5 V peak-to-peak to approximately 3.3 V peak-to-peak. This mode

reduces power consumption in 10 Mbps link speed and fully interoperates with legacy 10BASE-T

compliant PHYs over 100 m Cat5 cable or better.

To configure the VSC8504-02 in 10BASE-Te mode, set register 17E2.15 to 1 for each port. Additional

energy efficient Ethernet features are controlled through Clause 45 registers. For more information, see

Design Considerations, page 116.

3.5.7

Ring Resiliency

Ring resiliency changes the timing reference between the master and slave PHYs without altering the

master/slave configuration in 1000BASE-T mode. The master PHY transmitter sends data based on the

local clock and initiates timing recovery in the receiver. The slave PHY instructs node to switch the local

timing reference to the recovered clock from other PHYs in the box, freezes timing recovery, and locks

clock frequency for the transmitter. The master PHY makes a smooth transition to transmission from

local clock to recovered clock after timing lock is achieved.

Ring resiliency can be used in synchronous Ethernet systems, because the local clocks in each node are

synchronized to a grandmaster clock.

Note: For ring resiliency to successfully exchange master/slave timing over 1000BASE-T, the link partner must

also support ring resiliency.

3.6

Automatic Media Sense Interface Mode

Automatic media sense (AMS) mode automatically sets the media interface to Cat5 mode or SerDes

mode. The active media mode chosen is based on the automatic media sense preferences set in the

device register 23, bit 11. The following illustration shows a block diagram of AMS functionality on ports 0

through 3 of the VSC8504-02 device.

Figure 19 •

Automatic Media Sense Block Diagram

When both the SerDes and Cat5 media interfaces attempt to establish a link, the preferred media

interface overrides a linkup of the nonpreferred media interface. For example, if the preference is set for

SerDes mode and Cat5 media establishes a link, Cat5 becomes the active media interface. However,

after the SerDes media interface establishes a link, the Cat5 interface drops its link because the

preference was set for SerDes mode. In this scenario, the SerDes preference determines the active

media source until the SerDes link is lost. Also, Cat5 media cannot link up unless there is no SerDes

Auto Sense

Logic

Cat5

Fiber Optic

Module

MAC

PHY port_n

SIGDET

SerDes

QSGMII/

SGMII

Serial MAC

VSC8504-02 датащи(PDF) 28 Page - Microsemi Corporation

VSC8504-02 датащи(HTML) 28 Page - Microsemi Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL