VSC8504-02 datasheet(121/131 Pages) MICROSEMI

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Pin Descriptions

VMDS-10507 VSC8504-02 Datasheet Revision 4.2

110

application. No power supply sequencing is required. However, clock and power must be stable before

releasing Reset.

6.3.5

SGMII/SerDes/QSGMII MAC Interface

The following table lists the SerDes MAC interface pins.

Table 130 •

Power Supply Pins

Name

Type

Description

VDD1_[1:18]

E5, E12, F5, F12, G5, G12,

H5, H12, J5, J12, K5, K12,

L5, L12, M5, M12, N5, N12

1.0 V

1.0 V internal digital logic.

VDD1A_[1:10]

C7, C8, C9, C13, P6, P7, P8,

P9, P10, P11

1.0 V

1.0 V analog power requiring additional

PCB power supply filtering. Associated

with the QSGMII/SGMII MAC receiver

output pins.

VDD25_[1:4]

H13, M4, M13, P3

2.5 V

2.5 V general digital power supply.

Associated with the LED, GPIO, JTAG,

twisted pair interface, reference filter,

reference external supply connect, and

recovered clock pins.

VDD25A_[1:10]

C2, C4, C6, C11, C14, E4,

E13, P5, P12, P13

2.5 V

2.5 V general analog power supply.

VSS_[1:4]

VSS_[6:78]

B1, B16, C5, C12

D5, D6, D7, D8, D9, D10,

D11, D12, E6, E7, E8, E9,

E10, E11, F4, F6, F7, F8, F9,

F10, F11, G6, G7, G8, G9,

G10, G11, H6, H7, H8, H9,

H10, H11, J6, J7, J8, J9, J10,

J11, K6, K7, K8, K9, K10,

K11, L6, L7, L8, L9, L10, L11,

M6, M7, M8, M9, M10, M11,

N6, N7, N8, N9, N10, N11,

R1, R16, D14, E14, F13, F15,

G15, H15, H16, J13

0 V

General device ground.

Table 131 •

SerDes MAC Interface Pins

Name

Type

Description

RDN_0

RDP_0

P16

P15

O, ADIFF PHY0 QSGMII/SGMII/SerDes MAC receiver output pair.

RDN_1

RDN_2

RDN_3

RDP_1

RDP_2

RDP_3

T12

R12

O, ADIFF SGMII/SerDes MAC receiver output pair.

SerDes_Rext_0

P14

ABIAS

SerDes bias pins. Connect to a 620

Ω 1% resistor between

SerDes_Rext_0 and SerDes_Rext_1.

SerDes_Rext_1

N13

ABIAS

SerDes bias pins. Connect to a 620

Ω 1% resistor between

SerDes_Rext_0 and SerDes_Rext_1.

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