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VSC8504-02 датащи(PDF) 85 Page - Microsemi Corporation

номер детали VSC8504-02
подробное описание детали  Quad-Port 10/100/1000BASE-T PHY with Synchronous Ethernet and QSGMII/SGMII MAC
PDF  131 Pages
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производитель  MICROSEMI [Microsemi Corporation]
домашняя страница  http://www.microsemi.com
Logo MICROSEMI - Microsemi Corporation

VSC8504-02 датащи(HTML) 85 Page - Microsemi Corporation

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Registers
VMDS-10507 VSC8504-02 Datasheet Revision 4.2
74
4.5.9
Media SerDes PCS Status
The register at address 24E3 consists of the bits that provide status of the Media SerDes PCS block. The
following table shows the settings available.
10:7
Reserved
RO
Reserved
6
Polarity reversal input
Media SerDes polarity reversal
input
0: No polarity reversal (default)
1: Polarity reversed
0
5
Polarity reversal output
Media SerDes polarity reversal
output
0: No polarity reversal (default)
1: Polarity reversed
0
4:0
Reserved
RO
Reserved
Table 68 •
Media SerDes PCS Status, Address 24E3 (0x18)
Bit
Name
Access Description
15:14 Reserved
RO
Reserved
13
SerDes protocol transfer
RO
100 Mb or 100BASE-FX link status
12
SerDes protocol transfer
RO
10 Mb link status
11
Media interface link partner
autonegotiation restart
RO
1: Media interface link partner
autonegotiation restart request
occurred
10
Reserved
RO
Reserved
9:8
Remote fault detected
RO
01, 10, 11: Remote fault detected
from link partner
7
Link partner asymmetric pause
RO
1: Asymmetric pause advertised by
link partner
6
Link partner symmetric pause
RO
1: Symmetric pause advertised by
link partner
5
Link partner full duplex
advertisement
RO
1: Full duplex advertised by link
partner
4
Link partner half duplex
advertisement
RO
1: Half duplex advertised by link
partner
3
Link partner autonegotiation
capable
RO
1: Media interface link partner
autonegotiation capable
2
Media interface link status
RO
1: Media interface link status
1
Media interface autonegotiation
complete
RO
1: Media interface autonegotiation
complete
0
Reserved
Reserved
Table 67 •
Media SerDes PCS Control, Address 23E3 (0x17) (continued)
Bit
Name
Access Description
Default



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