VSC8504-02 datasheet(81/131 Pages) MICROSEMI

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Registers

VMDS-10507 VSC8504-02 Datasheet Revision 4.2

4.5

Extended Page 3 Registers

To access the extended page 3 registers (16E3–30E3), enable extended register access by writing

0x0003 to register 31. For more information, see Table 46, page 61.

When extended page 3 register access is enabled, reads and writes to registers 16–30 affect the

extended registers 16E3–30E3 instead of those same registers in the IEEE-specified register space.

Registers 0–15 are not affected by the state of the extended page register access.

Writing 0x0000 to register 31 restores the main register access.

The following table lists the addresses and register names in the extended register page 3 space. These

registers are accessible only when the device register 31 is set to 0x0003.

LP ring resiliency

Force ring resiliency

enable (override

autoneg)

R/W

Sticky

11:6

Reserved

000000

5:4

Ring resiliency

status

Ring resiliency status (from r1000 DSP SM)

00: Timing slave(1)

10: Timing slave becoming master

11: Timing master(1)

01: Timing master becoming slave

3:1

Reserved

000

Start switchover

(only when not in

progress)

RWSC

Reflects autoneg master/slave at initial link-up

Table 59 •

Extended Registers Page 3 Space

Address Name

16E3

MAC SerDes PCS Control

17E3

MAC SerDes PCS Status

18E3

MAC SerDes Clause 37 Advertised Ability

19E3

MAC SerDes Clause 37 Link Partner Ability

20E3

MAC SerDes Status

21E3

Media SerDes Transmit Good Packet Counter

22E3

Media SerDes Transmit CRC Error Counter

23E3

Media SerDes PCS Control

24E3

Media SerDes PCS Status

25E3

Media SerDes Clause 37 Advertised Ability

26E3

Media SerDes Clause 37 Link Partner Ability

27E3

Media SerDes status

28E3

Fiber Media CRC Good Counter

Table 58 •

Ring Resiliency, Address 30E2

Bit

Name

Access Description

Default

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