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VSC8504-02 датащи(PDF) 90 Page - Microsemi Corporation

номер детали VSC8504-02
подробное описание детали  Quad-Port 10/100/1000BASE-T PHY with Synchronous Ethernet and QSGMII/SGMII MAC
PDF  131 Pages
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производитель  MICROSEMI [Microsemi Corporation]
домашняя страница  http://www.microsemi.com
Logo MICROSEMI - Microsemi Corporation

VSC8504-02 датащи(HTML) 90 Page - Microsemi Corporation

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Registers
VMDS-10507 VSC8504-02 Datasheet Revision 4.2
79
4.6.4
GPIO Input
The input register contains information about the input to the device GPIO pins. Read from this register to
access the data on the device GPIO pins. The following table shows the readout you can expect.
4.6.5
GPIO Output
The output register allows you to access and control the output from the device GPIO pins. The following
table shows the values you can write.
Table 77 •
GPIO Input, Address 15G (0x0F)
Bit
Name
Access Description
Default
15:14
Reserved
RO
Reserved
00
13
GPIO13
RO
GPIO13 input
1
12
GPIO12
RO
GPIO12 input
1
11
GPIO11
RO
GPIO11 input
0
10
GPIO10
RO
GPIO10 input
0
9
GPIO9/FASTLINK_FAIL
RO
GPIO9/FASTLINK_FAIL input
1
8
GPIO8/I2C_SDA
RO
GPIO8/I2C_SDA input
1
7
GPIO7/I2C_SCL_3
RO
GPIO7/I2C_SCL_3 input
1
6
GPIO6/I2C_SCL_2
RO
GPIO6/I2C_SCL_2 input
1
5
GPIO5/I2C_SCL_1
RO
GPIO5/I2C_SCL_1 input
1
4
GPIO4/I2C_SCL_0
RO
GPIO4/I2C_SCL_0 input
1
3
GPIO3/SIGDET3
RO
GPIO3/SIGDET3 input
1
2
GPIO2/SIGDET2
RO
GPIO2/SIGDET2 input
1
1
GPIO1/SIGDET1
RO
GPIO1/SIGDET1 input
1
0
GPIO0/SIGDET0
RO
GPIO0/SIGDET0 input
0
Table 78 •
GPIO Output, Address 16G (0x10)
Bit
Name
Access Description
Default
15:14
Reserved
RO
Reserved
13
GPIO13
R/W
GPIO13 output
0
12
GPIO12
R/W
GPIO12 output
0
11
GPIO11
R/W
GPIO11 output
0
10
GPIO10
R/W
GPIO10 output
0
9
GPIO9/FASTLINK_FAIL
R/W
GPIO9/FASTLINK_FAIL output
0
8
GPIO8/I2C_SDA
R/W
GPIO8/I2C_SDA output
0
7
GPIO7/I2C_SCL_3
R/W
GPIO7/I2C_SCL_3 output
0
6
GPIO6/I2C_SCL_2
R/W
GPIO6/I2C_SCL_2 output
0
5
GPIO5/I2C_SCL_1
R/W
GPIO5/I2C_SCL_1 output
0
4
GPIO4/I2C_SCL_0
R/W
GPIO4/I2C_SCL_0 output
0
3
GPIO3/SIGDET3
R/W
GPIO3/SIGDET3 output
0
2
GPIO2/SIGDET2
R/W
GPIO2/SIGDET2 output
0
1
GPIO1/SIGDET1
R/W
GPIO1/SIGDET1 output
0



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