CYT4DNJBJS datasheet(103/209 Pages) INFINEON

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Datasheet

103

002-24601 Rev. *I

2023-02-14

TRAVEO™ T2G 32-bit Automotive MCU

Based on Arm® Cortex®-M7 dual

Electrical specifications

Table 26-3

DC specifications, CPU current, and transition time specifications

All specifications are valid for –40°C  TA  105°C and for 2.7 V to 5.5 V except where noted.

Spec ID

Parameter

Description

Min

Typ Max Units

Details/conditions

Execute with Flash

SID51B

ICC1

VCCD current in external PMIC

mode

–

700 1120

mA Typ: TA = 25°C, VCCD = 1.15 V,

process typ (TT)

Max: TA = 105°C, TJ = 150°C,

VCCD = 1.21 V,

process worst (FF)

(Maximum expected VCCD

when TJ = 150°C is reached

due to self-heating)

SID52B

IDD1

VDDD current in external PMIC

mode, Use case with VIDEOSS

(VDDD current for SID51B use

case)

–7

mA Both Cortex®-M7 at 320 MHz

generated by PLL with ECO

reference, executing

Dhrystone from flash with

cache enabled. Cortex®-M0+

is sleeping at 100 MHz.

Graphics Engine at 250 MHz,

operating 2D rendering,

drawing, capture, output on

2 displays. All other

peripherals, peripheral

clocks, interrupts, CSV, DMA,

ECO are enabled. No IO

toggling.

Typ: TA = 25°C,

VDDD = 5.0 V, VCCD = 1.15 V,

process typ (TT)

Max: TA = 105°C,

VDDD = 5.5 V, VCCD = 1.21 V,

process worst (FF)

SID56

IDD1

VDDDcurrentininternalregulator

mode, Execute from flash;

Cortex®-M7 CPU in Active mode

–8

mA Cortex®-M7_0 at 8 MHz

generated by IMO reference,

executing Dhrystone from

flash with cache enabled.

Cortex®-M0+ is sleeping at 8

MHz. CM7_1 is powered off.

All clocks at 8 MHz generated

by IMO.

VIDEOSS power switched off

All other peripherals,

peripheralclocks,interrupts,

CSV, DMA, PLL, ECO are

disabled. No IO toggling.

Typ: TA = 25°C, VDDD = 5.0 V,

process typ (TT)

Max: TA = 85°C, VDDD = 5.5 V,

process worst (FF)

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