CYT4DNJBJS datasheet(3/209 Pages) INFINEON

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Datasheet

002-24601 Rev. *I

2023-02-14

TRAVEO™ T2G 32-bit Automotive MCU

Based on Arm® Cortex®-M7 dual

Features

• Low-power 2.7-V to 5.5-V operation

- Low-power Active, Sleep, Low-power Sleep, DeepSleep, and Hibernate modes for fine-grained power

management

- Configurable options for robust BOD

• Two threshold levels (2.7 V and 3.0 V) for BOD on VDDD and VDDA_ADC

• One threshold level (1.1 V) for BOD on VCCD

• Wakeup support

- Up to 10 pins to wakeup from Hibernate mode

- Wakeup recognition bit for each wakeup source

- Up to 81 GPIO pins to wakeup from DeepSleep mode

- Event Generator, SCB, Watchdog Timer, RTC alarms to wake from DeepSleep modes

• Clocks

- Internal main oscillator (IMO)

- Internal low-speed oscillator (ILO)

- External crystal oscillator (ECO)

- Watch crystal oscillator (WCO)

- Phase-locked loop (PLL)

- Frequency-locked loop (FLL)

- Low-power external crystal oscillator (LPECO)

• Communication interfaces

- Up to four CAN FD channels

• Increased data rate (up to 8 Mbps) compared to classic CAN, limited by physical layer topology and

transceivers

• Compliant to ISO 11898-1:2015

• Supports all the requirements of Bosch CAN FD Specification V1.0 non-ISO CAN FD

• ISO 16845:2015 certificate available

- Up to 12 runtime-reconfigurable SCB (serial communication block) channels, each configurable as I2C, SPI,

or UART

- Up to two independent LIN channels

• LIN protocol compliant with ISO 17987

- Up to two CXPI channels with data rate up to 20 kbps

- 10/100/1000 Mbps Ethernet MAC interface conforming to IEEE-802.3az

• Supports the following PHY interfaces:

Media-independent interface (MII)

Reduced media-independent interface (RMII)

Reduced gigabit media-independent interface (RGMII)

• Compliant with IEEE-802.1AS, IEEE-802.1Qav, and IEEE-802.1Qbb for audio video bridging (AVB)

• Compliant with IEEE-1588 precision time protocol (PTP)

• Serial memory interface (SMIF)

- Two SPIs (single, dual, quad, or octal), xSPI interface

- On-the-fly encryption and decryption

- Execute-In-Place (XIP) from external memory

• Timers

- Up to 50 16-bit and 32 32-bit Timer/Counter Pulse-Width modulator (TCPWM) blocks for regular operations

• Up to 12 16-bit counters optimized for motor-control operations (Equivalent to 6 stepper motor-control

[SMC] channels with ZPD and slew rate control capability)

• Supports timer, capture, quadrature decoding, pulse-width modulation (PWM), PWM with dead time (PW-

M_DT), pseudo-random PWM (PWM_PR), and shift-register (SR) modes

- Up to 16 Event Generation (EVTGEN) timers supporting cyclic wakeup from DeepSleep

• Events trigger a specific device operation (such as execution of an interrupt handler, a SAR ADC conversion,

and so on)

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