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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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CYT4DNJBJS датащи(PDF) 91 Page - Infineon Technologies AG |
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CYT4DNJBJS датащи(HTML) 91 Page - Infineon Technologies AG |
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91 / 209 page  Datasheet 91 002-24601 Rev. *I 2023-02-14 TRAVEO™ T2G 32-bit Automotive MCU Based on Arm® Cortex®-M7 dual Bus masters 23 Bus masters The Arbiter (part of flash controller) performs priority-based arbitration based on the master identifier. Each bus master has a dedicated 4-bit master identifier. This master identifier is used for bus arbitration and IPC functionality. Table 23-1 Bus masters for access and protection control ID No. Master ID Description 0 CPUSS_MS_ID_CM0 Master ID for CM0+ 1 CPUSS_MS_ID_CRYPTO Master ID for Crypto 2 CPUSS_MS_ID_DW0 Master ID for P-DMA0 3 CPUSS_MS_ID_DW1 Master ID for P-DMA1 4 CPUSS_MS_ID_DMAC Master ID for M-DMA0 9 CPUSS_MS_ID_FAST0 Master ID for External AXI Master 0 (Ethernet#0) 10 CPUSS_MS_ID_FAST1 Master ID for External AXI Master 1 (JPEG Decoder) 11 CPUSS_MS_ID_FAST2 Master ID for M-DMA1 (AXI DMA) 12 CPUSS_MS_ID_FAST3 Master ID for VIDEO Subsystem 13 CPUSS_MS_ID_CM7_1 Master ID for CM7_1 14 CPUSS_MS_ID_CM7_0 Master ID for CM7_0 15 CPUSS_MS_ID_TC Master ID for DAP Tap Controller |
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