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CYT4DNJBJS датащи(PDF) 97 Page - Infineon Technologies AG

номер детали CYT4DNJBJS
подробное описание детали  TRAVEO™ T2G 32-bit Automotive MCU Based on Arm® Cortex®-M7 dual
PDF  209 Pages
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производитель  INFINEON [Infineon Technologies AG]
домашняя страница  http://www.infineon.com
Logo INFINEON - Infineon Technologies AG

CYT4DNJBJS датащи(HTML) 97 Page - Infineon Technologies AG

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Datasheet
97
002-24601 Rev. *I
2023-02-14
TRAVEO™ T2G 32-bit Automotive MCU
Based on Arm® Cortex®-M7 dual
Electrical specifications
SID15F
VI_MIPI_ABS
Input voltage[46]
VSSA_MIPI –
0.3
–VDDA_MIPI + 0.3
V
SID16
VI_ADC_ABS
Analog input voltage to ADC[46]
VSSA_ADC –
0.3
–VDDA_ADC + 0.3
V
See Table 3-4 for
assignment of ports to
supply domains
SID17A
VO_GPIO_ABS
Output voltage[46]
VSS – 0.3
–
VDDIO_GPIO +
0.3
V
See Table 3-4 for
assignment of ports to
supply domains
SID17B
VO_SMC_ABS
Output voltage[46]
VSS – 0.3
–
VDDIO_SMC +
0.3
V
See Table 3-4 for
assignment of ports to
supply domains
SID17C
VO_HSIO_ABS
Output voltage[46]
VSS – 0.3
–
VDDIO_HSIO +
0.3
V
See Table 3-4 for
assignment of ports to
supply domains
SID17E
VO_SMIF_ABS
Output voltage[46]
VSS – 0.3
–
VDDIO_SMIF +
0.3
V
See Table 3-4 for
assignment of ports to
supply domains
SID17G
VO_FPD0_ABS
Output voltage[46]
VSSA_FPD0–
0.3
–
VDDA_FPD0 +
0.3
V
SID17G_1
VO_FPD1_ABS
Output voltage[46]
VSSA_FPD1–
0.3
–
VDDA_FPD1 +
0.3
V
SID17H
VO_PMIC_EN_ABS
Output voltage[46]
VSS – 0.3
–
VDDD + 0.3
V
For the pin PMIC_EN
SID18
|ICLAMP_ABS|
Maximum clamp current[47, 48, 49, 50]
–5
–
5
mA
Applicable to general
purpose I/O pins
SID18A
Ʃ
ICLAMP_ABS
Total maximum clamp current
–25
–
25
mA
Applicable to general
purpose I/O pins in total for
VDDIO_GPIO_X
SID18B
|ICLAMP_ABS|
Maximum clamp current[47, 48, 49, 50]
–52
–
52
mA
Applicable to GPIO_SMC
I/O pins
SID18C
Ʃ
ICLAMP_ABS
Total Maximum clamp current
–624
–
624
mA
Applicable to GPIO_SMC
I/O pins clamping current
occurred by sudden
switching-off of inductive
load (stepper motor coil) in
total for VDDIO_SMC
SID18F
|ICLAMP_ABS|
Maximum clamp current[47, 48, 49, 50]
–5
–
5
mA
Applicable to HSIO_STDLN
and HSIO_STD pins
SID18G
Ʃ
ICLAMP_ABS
Total Maximum clamp current
–25
–
25
mA
Applicable to I/O pins in
total for VDDIO_HSIO
SID18J
|ICLAMP_ABS|
Maximum clamp current[47, 48, 49, 50]
–5
–
5
mA
Applicable to HSIO_ENH
pins
SID18K
Ʃ
ICLAMP_ABS
Total Maximum clamp current
–25
–
25
mA
Applicable to I/O pins in
total for VDDIO_SMIF
SID20
IOL1_GPIO_ABS
LOW-level maximum output current for
GPIO[51]
––
3.5
mA
Setting is 1 mA
SID21
IOL2_GPIO_ABS
LOW-level maximum output current for
GPIO[51]
––
7
mA
Setting is 2 mA
SID22
IOL3_GPIO_ABS
LOW-level maximum output current for
GPIO[51
––
10
mA
Setting is 5 mA
Table 26-1
Absolute maximum ratings (continued)
Spec ID
Parameter
Description
Min
Typ
Max
Units
Details/
conditions
Notes
47.A current-limiting resistor must be provided such that the current at the I/O pin does not exceed rated values at any time, including
during power transients. Refer to Figure 26-1 for more information on the recommended circuit.
48.VDDD and VDDIO must be sufficiently loaded or protected to prevent them from being pulled out of the recommended operating range
by the clamp current.
49.Clamp current can be applied only when the part is powered, and for ports between each pair of VDDIO/VSS pins (excluding ADC pins,
ECO_IN/OUT, LPECO_IN/LPECO_OUT, WCO_IN/OUT and XRES_L).
50.When the conditions of [47], [48], [49], and SID18/A/B/C/F/G/J/K are met, |ICLAMP_ABS| supersedes VIA_ABS and VI_ABS.
51.The maximum output current is the peak current flowing through any one GPIO I/O.



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