CYT4DNJBJS datasheet(23/209 Pages) INFINEON

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Datasheet

002-24601 Rev. *I

2023-02-14

TRAVEO™ T2G 32-bit Automotive MCU

Based on Arm® Cortex®-M7 dual

CYT4DN address map

Figure 4-1

CYT4DN address map[19, 20]

64 KB

254 KB

6080 KB

(32 KB Large Sectors)

96 KB

(2 KB Large Sectors)

32 KB

Arm System

Space

Peripheral

Interconnect or

Memory map

Flash

Supervisory

Work flash

Code flash

SRAM0

ROM Mirror

0x0100 0000

0x0100 FFFF

0x1000 0000

0x1062 FFFF

0x1400 0000

0x1401 FFFF

0x1700 0000

0x1700 7FFF

0x4000 0000

0x43FF FFFF

0xE000 0000

0xFFFF FFFF

Mainly used for on-chip peripherals;

e.g., AHB or APB peripherals

Secured Boot ROM to set user specified

protection levels, trim and configuration

data, code authentication, jump to user mode, etc.

Mainly used for user program code

Work flash used for long

term data retention

CPU &Debug Registers

Used to store manufacture specific

data like flash protection settings, trim

settings, device addresses, serial numbers,

calibration data, etc.

Reserved

32 KB

0x1780 0000

0x1780 7FFF

Alternate Flash

Supervisory

0x2800 0000

0x2803 FFFF

0x2808 0000

0x105E FFFF

0x105F 0000

0x1401 7FFF

0x1401 8000

512 MB

0x6000 0000

0x7FFF FFFF

Reserved

SMIF_XIP

Serial Memory Interface XIP

General purpose RAM,

mainly used for data

64 KB

Reserved

64 KB

Reserved

0xA000 0000

0xA000 FFFF

0xA001 0000

0xA001 FFFF

0xA010 0000

0xA010 FFFF

0xA011 0000

0xA011 FFFF

CM7_0 ITCM

CM7_0 DTCM

CM7_1 ITCM

CM7_1 DTCM

Core CM7_0 Instruction TCM

Core CM7_0 Data TCM

Core CM7_1 Instruction TCM

Core CM7_1 Data TCM

256 KB

(8 KB Small Sectors)

32 KB

(128 B Small Sectors)

128 KB

SRAM2

0x2809 FFFF

512 MB

0x9FFF FFFF

SMIF_XIP

Serial Memory Interface XIP

0x8000 0000

4 MB

0x2400 0000

VRAM

Video RAM for Graphics

0x243F FFFF

256 KB

SRAM1

0x2804 0000

0x2807 FFFF

Reserved

0x2000 0000

0x2000 FFFF

64 KB

CM7 DTCM

CM7 internal address map for its Data TCM

64 KB

ROM / CM7 ITCM

0x0000 0000

0x0000 FFFF

Reserved

CM7 internal address map for its Instruction TCM.

The address overlaps with ROM region.

2 KB

0x2800 0800

Notes

19.The size representation is not up to scale.

20.First 2KB of SRAM is reserved, not available for users. User must keep the power of first 32KB block of SRAM0 in enabled or retained

in all Active, LP Active, Sleep, LP Sleep, DeepSleep modes.

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