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CYT4DNJBJS датащи(PDF) 53 Page - Infineon Technologies AG

номер детали CYT4DNJBJS
подробное описание детали  TRAVEO™ T2G 32-bit Automotive MCU Based on Arm® Cortex®-M7 dual
PDF  209 Pages
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производитель  INFINEON [Infineon Technologies AG]
домашняя страница  http://www.infineon.com
Logo INFINEON - Infineon Technologies AG

CYT4DNJBJS датащи(HTML) 53 Page - Infineon Technologies AG

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Datasheet
53
002-24601 Rev. *I
2023-02-14
TRAVEO™ T2G 32-bit Automotive MCU
Based on Arm® Cortex®-M7 dual
Interrupts and wake-up assignments
361
cpuss_interrupts_dw0_65_IRQn
Active
CPUSS P-DMA0, Channel #65 Interrupt
362
cpuss_interrupts_dw0_66_IRQn
Active
CPUSS P-DMA0, Channel #66 Interrupt
363
cpuss_interrupts_dw0_67_IRQn
Active
CPUSS P-DMA0, Channel #67 Interrupt
364
cpuss_interrupts_dw0_68_IRQn
Active
CPUSS P-DMA0, Channel #68 Interrupt
365
cpuss_interrupts_dw0_69_IRQn
Active
CPUSS P-DMA0, Channel #69 Interrupt
366
cpuss_interrupts_dw0_70_IRQn
Active
CPUSS P-DMA0, Channel #70 Interrupt
367
cpuss_interrupts_dw0_71_IRQn
Active
CPUSS P-DMA0, Channel #71 Interrupt
368
cpuss_interrupts_dw0_72_IRQn
Active
CPUSS P-DMA0, Channel #72 Interrupt
369
cpuss_interrupts_dw0_73_IRQn
Active
CPUSS P-DMA0, Channel #73 Interrupt
370
cpuss_interrupts_dw0_74_IRQn
Active
CPUSS P-DMA0, Channel #74 Interrupt
371
cpuss_interrupts_dw0_75_IRQn
Active
CPUSS P-DMA0, Channel #75 Interrupt
424
cpuss_interrupts_dw1_0_IRQn
Active
CPUSS P-DMA1, Channel #0 Interrupt
425
cpuss_interrupts_dw1_1_IRQn
Active
CPUSS P-DMA1, Channel #1 Interrupt
426
cpuss_interrupts_dw1_2_IRQn
Active
CPUSS P-DMA1, Channel #2 Interrupt
427
cpuss_interrupts_dw1_3_IRQn
Active
CPUSS P-DMA1, Channel #3 Interrupt
428
cpuss_interrupts_dw1_4_IRQn
Active
CPUSS P-DMA1, Channel #4 Interrupt
429
cpuss_interrupts_dw1_5_IRQn
Active
CPUSS P-DMA1, Channel #5 Interrupt
430
cpuss_interrupts_dw1_6_IRQn
Active
CPUSS P-DMA1, Channel #6 Interrupt
431
cpuss_interrupts_dw1_7_IRQn
Active
CPUSS P-DMA1, Channel #7 Interrupt
432
cpuss_interrupts_dw1_8_IRQn
Active
CPUSS P-DMA1, Channel #8 Interrupt
433
cpuss_interrupts_dw1_9_IRQn
Active
CPUSS P-DMA1, Channel #9 Interrupt
434
cpuss_interrupts_dw1_10_IRQn
Active
CPUSS P-DMA1, Channel #10 Interrupt
435
cpuss_interrupts_dw1_11_IRQn
Active
CPUSS P-DMA1, Channel #11 Interrupt
436
cpuss_interrupts_dw1_12_IRQn
Active
CPUSS P-DMA1, Channel #12 Interrupt
437
cpuss_interrupts_dw1_13_IRQn
Active
CPUSS P-DMA1, Channel #13 Interrupt
438
cpuss_interrupts_dw1_14_IRQn
Active
CPUSS P-DMA1, Channel #14 Interrupt
439
cpuss_interrupts_dw1_15_IRQn
Active
CPUSS P-DMA1, Channel #15 Interrupt
440
cpuss_interrupts_dw1_16_IRQn
Active
CPUSS P-DMA1, Channel #16 Interrupt
441
cpuss_interrupts_dw1_17_IRQn
Active
CPUSS P-DMA1, Channel #17 Interrupt
442
cpuss_interrupts_dw1_18_IRQn
Active
CPUSS P-DMA1, Channel #18 Interrupt
443
cpuss_interrupts_dw1_19_IRQn
Active
CPUSS P-DMA1, Channel #19 Interrupt
444
cpuss_interrupts_dw1_20_IRQn
Active
CPUSS P-DMA1, Channel #20 Interrupt
445
cpuss_interrupts_dw1_21_IRQn
Active
CPUSS P-DMA1, Channel #21 Interrupt
446
cpuss_interrupts_dw1_22_IRQn
Active
CPUSS P-DMA1, Channel #22 Interrupt
447
cpuss_interrupts_dw1_23_IRQn
Active
CPUSS P-DMA1, Channel #23 Interrupt
448
cpuss_interrupts_dw1_24_IRQn
Active
CPUSS P-DMA1, Channel #24 Interrupt
449
cpuss_interrupts_dw1_25_IRQn
Active
CPUSS P-DMA1, Channel #25 Interrupt
450
cpuss_interrupts_dw1_26_IRQn
Active
CPUSS P-DMA1, Channel #26 Interrupt
451
cpuss_interrupts_dw1_27_IRQn
Active
CPUSS P-DMA1, Channel #27 Interrupt
452
cpuss_interrupts_dw1_28_IRQn
Active
CPUSS P-DMA1, Channel #28 Interrupt
453
cpuss_interrupts_dw1_29_IRQn
Active
CPUSS P-DMA1, Channel #29 Interrupt
454
cpuss_interrupts_dw1_30_IRQn
Active
CPUSS P-DMA1, Channel #30 Interrupt
455
cpuss_interrupts_dw1_31_IRQn
Active
CPUSS P-DMA1, Channel #31 Interrupt
Table 14-1
Peripheral interrupt assignments and wake-up sources (continued)
Interrupt
Source
Power
mode
Description



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