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CYT4DNJBJS датащи(PDF) 67 Page - Infineon Technologies AG |
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CYT4DNJBJS датащи(HTML) 67 Page - Infineon Technologies AG |
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67 / 209 page ![]() Datasheet 67 002-24601 Rev. *I 2023-02-14 TRAVEO™ T2G 32-bit Automotive MCU Based on Arm® Cortex®-M7 dual Triggers one-to-one 30 SMIF1_TX_TR_OUT PDMA1_TR_IN[46] SMIF1 TX to P-DMA1 Trigger 31 SMIF1_RX_TR_OUT PDMA1_TR_IN[47] SMIF1 RX to P-DMA1 Trigger 32:36 MIXER0_TR_SRC_REQ_OUT[0:4] PDMA1_TR_IN[48:52] MIXER0 to P-DMA1 trigger 37 MIXER0_TR_DST_REQ_OUT PDMA1_TR_IN[53] MIXER0 to P-DMA1 trigger 38:42 MIXER1_TR_SRC_REQ_OUT[0:4] PDMA1_TR_IN[54:58] MIXER1 to P-DMA1 trigger 43 MIXER1_TR_DST_REQ_OUT PDMA1_TR_IN[59] MIXER1 to P-DMA1 trigger 44:47 AXIDMA_TR_OUT[0:3] PDMA1_TR_IN[60:63] AXI M-DMA1 to P-DMA1 trigger 52:55 TDM0_TX_TR_OUT[0:3] PDMA1_TR_IN[68:71] TDM0 TX to P-DMA1 trigger 56:59 TDM0_RX_TR_OUT[0:3] PDMA1_TR_IN[72:75] TDM0 RX to P-DMA1 trigger 60:64 SG0_TX_TR_OUT[0:4] PDMA1_TR_IN[76:80] SG0 TX to P-DMA1 trigger 65:66 PWM0_TX_TR_OUT[0:1] PDMA1_TR_IN[81:82] PWM0 TX to P-DMA1 trigger 67 AUDIODAC0_TX_TR_OUT PDMA1_TR_IN[83] AUDIODAC0 to P-DMA1 trigger MUX Group 2: PASS SARx to TCPWM1 direct connect 0 PASS0_CH_RANGEVIO_TR_OUT[0] TCPWM0_16_ONE_CNT_TR_IN[0] SAR0 ch#0[43], range violation to TCPWM0 Group#0 Counter#00 trig=0 1 PASS0_CH_RANGEVIO_TR_OUT[1] TCPWM0_16_ONE_CNT_TR_IN[1] SAR0 ch#1, range violation to TCPWM0 Group#0 Counter#01 trig=0 2 PASS0_CH_RANGEVIO_TR_OUT[2] TCPWM0_16_ONE_CNT_TR_IN[2] SAR0 ch#2, range violation to TCPWM0 Group#0 Counter#02 trig=0 3 PASS0_CH_RANGEVIO_TR_OUT[3] TCPWM0_16_ONE_CNT_TR_IN[3] SAR0 ch#3, range violation to TCPWM0 Group#0 Counter#03 trig=0 4 PASS0_CH_RANGEVIO_TR_OUT[4] TCPWM0_16_ONE_CNT_TR_IN[4] SAR0 ch#4, range violation to TCPWM0 Group#0 Counter#04 trig=0 5 PASS0_CH_RANGEVIO_TR_OUT[5] TCPWM0_16_ONE_CNT_TR_IN[5] SAR0 ch#5, range violation to TCPWM0 Group#0 Counter#05 trig=0 6 PASS0_CH_RANGEVIO_TR_OUT[6] TCPWM0_16_ONE_CNT_TR_IN[6] SAR0 ch#6, range violation to TCPWM0 Group#0 Counter#06 trig=0 7 PASS0_CH_RANGEVIO_TR_OUT[7] TCPWM0_16_ONE_CNT_TR_IN[7] SAR0 ch#7, range violation to TCPWM0 Group#0 Counter#07 trig=0 8 PASS0_CH_RANGEVIO_TR_OUT[8] TCPWM0_16_ONE_CNT_TR_IN[8] SAR0 ch#8, range violation to TCPWM0 Group#0 Counter#08 trig=0 9 PASS0_CH_RANGEVIO_TR_OUT[9] TCPWM0_16_ONE_CNT_TR_IN[9] SAR0 ch#9, range violation to TCPWM0 Group#0 Counter#09 trig=0 10 PASS0_CH_RANGEVIO_TR_OUT[10] TCPWM0_16_ONE_CNT_TR_IN[10] SAR0 ch#10, range violation to TCPWM0 Group#0 Counter#10 trig=0 11 PASS0_CH_RANGEVIO_TR_OUT[11] TCPWM0_16_ONE_CNT_TR_IN[11] SAR0 ch#11, range violation to TCPWM0 Group#0 Counter#11 trig=0 12 PASS0_CH_RANGEVIO_TR_OUT[12] TCPWM0_16_ONE_CNT_TR_IN[12] SAR0 ch#12, range violation to TCPWM0 Group#0 Counter#12 trig=0 13 PASS0_CH_RANGEVIO_TR_OUT[13] TCPWM0_16_ONE_CNT_TR_IN[13] SAR0 ch#13, range violation to TCPWM0 Group#0 Counter#13 trig=0 14 PASS0_CH_RANGEVIO_TR_OUT[14] TCPWM0_16_ONE_CNT_TR_IN[14] SAR0 ch#14, range violation to TCPWM0 Group#0 Counter#14 trig=0 15 PASS0_CH_RANGEVIO_TR_OUT[15] TCPWM0_16_ONE_CNT_TR_IN[15] SAR0 ch#15, range violation to TCPWM0 Group#0 Counter#15 trig=0 16 PASS0_CH_RANGEVIO_TR_OUT[16] TCPWM0_16_ONE_CNT_TR_IN[16] SAR0 ch#16, range violation to TCPWM0 Group#0 Counter#16 trig=0 17 PASS0_CH_RANGEVIO_TR_OUT[17] TCPWM0_16_ONE_CNT_TR_IN[17] SAR0 ch#17, range violation to TCPWM0 Group#0 Counter#17 trig=0 18 PASS0_CH_RANGEVIO_TR_OUT[18] TCPWM0_16_ONE_CNT_TR_IN[18] SAR0 ch#18, range violation to TCPWM0 Group#0 Counter#18 trig=0 19 PASS0_CH_RANGEVIO_TR_OUT[19] TCPWM0_16_ONE_CNT_TR_IN[19] SAR0 ch#19, range violation to TCPWM0 Group#0 Counter#19 trig=0 20 PASS0_CH_RANGEVIO_TR_OUT[20] TCPWM0_16M_ONE_CNT_TR_IN[0] SAR0 ch#20, range violation to TCPWM0 Group#1 Counter#00 trig=0 21 PASS0_CH_RANGEVIO_TR_OUT[21] TCPWM0_16M_ONE_CNT_TR_IN[1] SAR0 ch#21, range violation to TCPWM0 Group#1 Counter#01 trig=0 Table 19-1 Triggers 1:1 (continued) Input Trigger In Trigger Out Description Note 43.Each logical channel of SAR ADC[x] can be connected to any of the SAR ADC[x]_y external pin. (x = 0, or 1, or, 2 and y=0 to max 31) |
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