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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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CYT4DNJBJS датащи(PDF) 32 Page - Infineon Technologies AG |
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CYT4DNJBJS датащи(HTML) 32 Page - Infineon Technologies AG |
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32 / 209 page  Datasheet 32 002-24601 Rev. *I 2023-02-14 TRAVEO™ T2G 32-bit Automotive MCU Based on Arm® Cortex®-M7 dual Package pin list and alternate functions 11 Package pin list and alternate functions Most pins have alternate functionality, as specified in Table 11-1. Table 11-1 Pin selector and alternate pin functions in DeepSleep (DS) Mode, Analog, Smart I/O[36] Name Package I/O Type DeepSleep Mapping Analog/HV Smart I/O 327-BGA HCon#0 HCon#29[31] HCon#30 Pin DS#5[32, 33] DS#6 P0.0 F17 GPIO_ENH P0.1 E18 GPIO_ENH HIBERNATE_WAKEUP[4] P0.2 E17 GPIO_ENH SCB0_SDA P0.3 B20 GPIO_ENH SCB0_SCL HIBERNATE_WAKEUP[5] P0.4 B19 GPIO_ENH P0.5 A19 GPIO_ENH P1.0 H19 GPIO_STD ECO_IN[34] P1.1 H20 GPIO_STD ECO_OUT[34] P1.4 G19 GPIO_STD WCO_IN, LPECO_IN[34] P1.5 F20 GPIO_STD WCO_OUT, LPECO_OUT[34] P2.3 D18 GPIO_STD RTC_CAL P2.4 C18 GPIO_STD SWJ_TRSTN HIBERNATE_WAKEUP[2] P2.5 C20 GPIO_STD RTC_CAL HIBERNATE_WAKEUP[9] P2.6 C19 GPIO_STD SWJ_SWO_TDO P3.0 B18 GPIO_STD SWJ_SWCLK_TCLK P3.1[35] A18 GPIO_STD HIBERNATE_WAKEUP[0] P3.2 D17 GPIO_STD SWJ_SWDIO_TMS P3.3 C17 GPIO_STD SWJ_SWDOE_TDI HIBERNATE_WAKEUP[1] P3.4 B17 GPIO_STD P4.0 A17 GPIO_STD P4.1 D16 GPIO_STD P4.2 C16 GPIO_STD P4.3 B16 GPIO_STD P4.4 A16 GPIO_STD P4.5 D15 GPIO_STD HIBERNATE_WAKEUP[6] P4.6 C15 GPIO_STD P4.7 B15 GPIO_STD P5.0 A15 GPIO_STD P5.1 D14 GPIO_STD HIBERNATE_WAKEUP[7] P5.2 C14 GPIO_STD P5.3 B14 GPIO_STD HIBERNATE_WAKEUP[8] P5.4 A14 GPIO_STD P5.5 C13 GPIO_STD HIBERNATE_WAKEUP[3] P5.6 B13 GPIO_STD ADC[0]_0 Notes 31. HCON (High Speed I/O matrix connection) reference as per Table 10-1. 32. DeepSleep ordering (DS#0, DS#1, DS#2) does not have any impact on choosing any alternate functions; the HSIOM module handles the individual alternate function assignment. 33. All port pin functions available in DeepSleep mode are also available in Active mode. 34. I/O pins that support an oscillator function (WCO or ECO) must be configured for high-impedance if the oscillator is enabled. 35. This I/O will have increased leakage to ground when VDDD is below the POR threshold. 36. The output pins of FPD and DAC (FPDx_y/DAC_x) peripherals during the reset will be in high impedance state. 37. See Table 26-10 'Serial Communication Block (SCB) specifications' for supported IO-cells and I2C modes. |
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