VSC8504-02 datasheet(101/131 Pages) MICROSEMI

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Electrical Specifications

VMDS-10507 VSC8504-02 Datasheet Revision 4.2

5.1.4

Reference Clock

The following table shows the DC specifications for a differential reference clock input signal

5.1.5

SerDes Interface (SGMII)

The SerDes output drivers are designed to operate in SGMII/LVDS mode. The SGMII/LVDS mode meets

or exceeds the DC requirements of Serial-GMII Specification Revision 1.9 (ENG-46158), unless

otherwise noted. The following table lists the DC specifications for the SGMII driver. The values are valid

for all configurations, unless stated otherwise.

Internal pull-up resistor, all others

RPU

120

144

Internal pull-down resistor

RPD

120

144

Table 100 •

Reference Clock DC Characteristics

Parameter

Symbol

Minimum

Typical

Maximum

Unit

Input voltage range

VIP,VIN

–25

1260

Input differential peak-to-peak

voltage

|VID|1501

To meet jitter specifications, the minimum |VID| must be 400 mV. When using a single-ended clock input, the

REFCLK_P low voltage must be less than

VDDA – 200 mV, and the high voltage level must be greater than VDDA + 200 mV

1200

Input common-mode voltage

VICM

12002

The maximum common-mode voltage is provided without a differential signal. The common-mode voltage is

only limited by the maximum and minimum input voltage range and by the differential amplitude of the input

signal.

Differential input impedance

100

Table 101 •

SerDes Driver DC Specifications

Parameter

Symbol Minimum

Maximum

Unit Condition

Output high voltage, VOA or VOB

VOH

1050

RL =100 Ω ±1%

Output low voltage, VOA or VOB

VOL

0mV

RL =100 Ω ±1%

Output differential peak voltage

|VOD|

350

450

VDD_VS =1.0 V

RL =100 Ω ±1%

Output differential peak voltage,

fiber media 1000BASE-X

|VOD|

350

450

VDD_VS =1.0 V

RL =100 Ω ±1%

Output offset voltage(1)

VOS

420

580

VDD_VS =1.0 V

RL =100 Ω ±1%

DC output impedance,

single-ended, SGMII mode

140

VC =1.0 V

See Figure 40,

page 91

RO mismatch between A and B,

SGMII mode(2)

ΔRO

VC =1.0 V

See Figure 40,

page 91

Change in |VOD| between 0 and 1,

SGMII mode

Δ|VOD|25

RL =100 Ω ±1%

Table 99 •

Internal Pull-Up or Pull-Down Resistors (continued)

Parameter

Symbol

Minimum

Typical Maximum

Unit

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