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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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ADP1053ACPZ-R7 датащи(PDF) 5 Page - Analog Devices |
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ADP1053ACPZ-R7 датащи(HTML) 5 Page - Analog Devices |
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5 / 84 page  Data Sheet ADP1053 Rev. A | Page 5 of 84 SPECIFICATIONS VDD = 3.0 V to 3.6 V, TA = −40°C to +125°C, unless otherwise noted. FSR = full-scale range. Table 1. Parameter Test Conditions/Comments Min Typ Max Unit SUPPLY VDD 3.0 3.3 3.6 V IDD PWM pins unloaded Normal operation (PSON high) 30 mA Power supply off (PSON low) 30 mA Shutdown (VDD below UVLO) 100 μA During EEPROM programming IDD + 8 mA POWER-ON RESET UVLO Threshold VDD Rising 3.0 V VDD Falling 2.750 2.85 2.975 V OVLO Threshold 3.7 3.9 4.1 V OVLO Debounce When set to 2 μs 2 μs When set to 500 μs 500 μs VCORE PIN Output Voltage 330 nF capacitor between VCORE and DGND 2.3 2.5 2.7 V OSCILLATOR AND PLL PLL Frequency RES = 10 kΩ 200 MHz DPWM Resolution 625 ps VS_A, VS_B VOLTAGE SENSE Input Voltage Differential voltage from VS+_A to VS−_A and from VS+_B to VS−_B 0 1 1.6 V Input Voltage FSR 1.6 V VS_A, VS_B Accurate ADCs Valid Input Voltage Range 0 1.5 V ADC Register Update Rate 100 Hz Resolution 12 Bits Measurement Accuracy From 0% to 100% of valid input voltage −2.8 +2.1 % FSR −44.8 +33.6 mV From 10% to 90% of valid input voltage −1.35 +2.1 % FSR −21.6 +33.6 mV From 900 mV to 1.1 V −1.2 +1.65 % FSR −19.2 +26.4 mV Temperature Stability From 900 mV to 1.1 V −0.1 +0.1 mV/°C Common-Mode Voltage Offset Voltage from VS−_A and VS−_B to AGND to achieve measurement accuracy −200 0 +200 mV VS_A, VS_B High Speed ADCs Equivalent Resolution At 390.6 kHz switching frequency 6 Bits Dynamic Range Regulation voltage 300 mV to 1.4 V ±10 mV VS_A, VS_B UVP Based on VS_A, VS_B accurate ADC Threshold Accuracy Same as accurate ADC measurement accuracy specifications Comparator Update Speed 10 ms OVP_A, OVP_B PINS Threshold Accuracy −1.7 +1.6 % Propagation Delay (Latency) Debounce time not included 58 110 ns |
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