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MPF0900AMBA2ES датащи(PDF) 155 Page - NXP Semiconductors |
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MPF0900AMBA2ES датащи(HTML) 155 Page - NXP Semiconductors |
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155 / 205 page ![]() NXP Semiconductors PF09 Nine-channel power management IC with advanced system safety monitoring pin when the main digital controller is not operational due to the loss of the main control input supply (VIN), assuming the condition is derived from a pin disconnection. Note that a loss of the input supply derived from any condition other than a VIN pin disconnection (i.e. the main system supply is lost) is considered as a safe fault condition, because it is assumed all circuits powered by VIN will behave in a safe way as the overall input supply is discharging. 14.6 External error monitoring (ERRMON) In devices targeting high safety integrity levels, the GPIO3 pin provides a programmable mechanism to monitor a non-critical, safety-related external error signal from the system via the ERRMON mechanism. The polarity to detect an external error is programmable in OTP via the OTP_ERRMON_POL bit. OTP_ERRMON_POL ERRMON polarity 0 Error on rising edge 1 Error on Falling edge Table 200. ERRMON polarity selection bit When the ERRMON input detects an external error, the ERRMON block will set the ERRMON_I flag HIGH and start the external fault timer before it can confirm a fault condition. In order for the system to listen to the ERRMON interrupt as soon as it is generated, the ERRMON interrupt must be unmasked to allow it to assert the INTB pin. If the ERRMON_I flag is cleared before the external fault timer is expired, the device stops and resets the external fault timer, and no protective action is taken. The MCU must write a 1 to the ERRMON_I to clear the interrupt. If the ERRMON_I flag is not cleared when the external fault timer expires, the device will assert the FS0B pin to indicate an external fault has been confirmed. aaa-056083 Error signal (GPIO3 pin) XFault timer Event detected Event acknowledged Event detected Fault confirmed ERRMON_I INTB FS0B XFault timer XFAULT CONFIRMED NO XFAULT Figure 42. ERRMON operation By default, the external fault timer is reset to 8 ms at power-up, and it can be changed during the SYSTEM ON states via the ERRMON_TIME bits. PF09 All information provided in this document is subject to legal disclaimers. © 2026 NXP B.V. All rights reserved. Product data sheet Rev. 1.3 — 16 December 2025 Document feedback 155 / 205 |
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