MPF0900AMBA2ES datasheet(26/205 Pages) NXP

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NXP Semiconductors

PF09

Nine-channel power management IC with advanced system safety monitoring

In “Limited Retry” operation, the PF09 will try to exit the DFS state until the 4-MSB of the RETRY_CNT[7:0]

reach the value of the OTP_RETRY_MSK[3:0] bits. When the 4-MSB of the RETRY_CNT[7:0] reach the

OTP_RETRY_MSK[3:0] value, the auto-retry timer is disabled and the system will no longer be able to exit the

DFS state via the auto-retry timer.

During “infinite retry” operation, the device will try to exit the DFS state every time the TRETRY expires. When

the 4-MSB of the RETRY_CNT[7:0] reach the OTP_RETRY_MSK[3:0] value, the 4-MSB of the retry counter

value will be clamped and the device will use the corresponding TRETRY for every following power-up retry

attempt.

The auto-retry function is intended to allow the system to retry operation in a timely manner, providing system

availability during random fault conditions. At the same time, it provides a power saving strategy when the

system experiences a non-recoverable cyclic fault condition, by reducing the frequency at which the device tries

to exit the DFS state on every fault cycle.

The retry timer can be rescaled down by writing 0x00 to RETRY_CNT[7:0], which resets it.

If the VIN < UVDET by the time there is a valid condition for leaving the DFS state, the device will wait in the

DFS state until VIN > UVDET.

All parameters are specified at TA = -40 °C to 125 °C, unless otherwise noted. Typical values are characterized at VIN = 5 V

and TA = 25 °C, unless otherwise noted.

Symbol

Description

Min

Typ

Max

Unit

TBASE_RETRY

Auto-retry time base

100

105

Table 19. Auto-retry time base

11.2.12 VDDOTP modes

The PF09 supports OTP fuse bank configuration and Debug mode through the VDDOTP pin.

• If VDDOTP = GND, the device loads the configuration from the OTP fuses and operates in Normal mode.

• If VDDOTP ≥ 1.3 V, the device enters Debug mode. The OTP configuration is accessible through mirror

registers, and the device operates in a limited functionality mode.

• If VDDOTP ≥ 7.5 V, the device enters Programming mode and the OTP configuration is defined in the OTP

registers, allowing the device to fuse the OTP registers. This configuration will be loaded in normal operation.

Configuration emulation and programming (OTP) can be performed by the customer during engineering

development using NXP's latest graphical user interface and an evaluation board. Customer is not allowed to

perform OTP programming for production purposes. Only NXP or a recommended third party are allowed to

program the device for production purposes.

Function name

Description

Symbol

Min

Typ

Max

Unit

VDDOTP_OTP

VDDOTP 1.5 V threshold

VDDOTP1P4TH

1.3

1.4

1.5

VDDOTP_DBG

VDDOTP 3.0 V threshold

VDDOTP3P0TH

2.9

3.0

3.1

VDDOTP_PGR

VDDOTP programming voltage

range

VDDOTP_PRG

7.5

–

8.5

Table 20. VDDOTP pin electrical characteristics

11.2.12.1 Debug operation

The PF09 allows temporary configuration to debug or test a customized power-up configuration in the system.

To access Debug mode, the VDDOTP pin should be pulled up to high above VDDOTP3P0TH.

PF09

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 1.3 — 16 December 2025

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