MPF0900AMBA2ES datasheet(153/205 Pages) NXP

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NXP Semiconductors

PF09

Nine-channel power management IC with advanced system safety monitoring

When the WD counter is disabled or the WD_OK_FCD[2:0] bits are set to 0b000, the WD_OK_CTN[2:0] bits will

have no effect on the FAULT_CNT[3:0] or RESET_CNT[3:0] counters. In this case, the system must implement

a routine to clear the system counters manually, to avoid a turnoff event due to compounded random faults.

14.5 FS0B active safe-state mode

In devices targeting a high safety integrity level, the FS0B is used as a dedicated safety output operating in

Active Safe-state mode. In this mode, the PF09 implements several mechanisms to ensure the FS0B is able to

assert LOW, to indicate the PMIC is in a safe state.

The PF09 assumes the following safe states:

• PMIC in RUN state with FS0B pin asserted

• PMIC in STANDBY state with FS0B pin asserted

• PMIC in OFF states with RSTB and FS0B asserted

• PMIC in Deep Fail-safe state with RSTB and FS0B asserted

• System reset (WD or XRESET event with RSTB and FS0B asserted)

• Unresponsive main digital control unit with FS0B and RSTB asserted

During the RUN states, the FS0B remains asserted low until the MCU requests an FS0B release command via

I2C. In the STANDBY states, the FS0B is always asserted LOW.

To request an FS0B release command, the MCU must write the code 0xA5 into the FS0B_RELEASE [7:0] bits.

Any other value on the FS0B_RELEASE[7:0] bits will be ignored.

The FS0B will be allowed to release only after all conditions flagging a potential safety-related fault are

acknowledged and cleared when the FS0B release command is requested:

• Power-up sequence has been finished

• RSTB is released. ( device is in the SYSTEM ON states)

• All ABIST flags are 0 (ABIST OK)

• The LBIST_STATUS[1:0] = 11 (LBIST Passed)1

• The FAULT_CNT[3:0] = 0x00

• The DCRC_FLG = 0

• The DFS_FLG = 0

• The VIN_OV_FLG = 0

• The XFAIL_FLG = 0

• The WD_FLG = 0

• The XRESET_FLG = 0

• The SFAULT_FLG = 0

• The HFAULT_FLG = 0

• The BGMON_I = 0 (no Bandgap drift detected)

• The CLKMON_I = 0 (no clock drift detected)

• The SHS_I = 0 (no safety handshake fault detected)1

• No Short condition is detected on PGOOD and FS0B outputs

Once the FS0B pin is released, the pin will assert LOW if one or more safety-related fault conditions occur:

• The MCU writes a 0x4B code into the FS0B_RELEASE[7:0] bits

• The RSTB pin is asserted LOW (internally or externally)

• An OV condition in the VDIG or VANA supplies

• A hard fault starts a power-down sequence

Conditions are evaluated only on devices featuring functions such as LBIST, DMS, or safety handshake.

PF09

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 1.3 — 16 December 2025

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