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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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MPF0900AMBA2ES датащи(PDF) 159 Page - NXP Semiconductors |
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MPF0900AMBA2ES датащи(HTML) 159 Page - NXP Semiconductors |
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159 / 205 page  NXP Semiconductors PF09 Nine-channel power management IC with advanced system safety monitoring aaa-056084 FCCU0 EOUT[0] Reset phase /self-test Normal phase Error phase FCCU1 EOUT[1] Input /high-Z Output FCCU bi-stable protocol Config phase Figure 43. FCCU bistable protocol During bistable operation, the FCCU0_POL bit will set the polarity to detect a fault condition. FCCU0_POL FCCU0 pin FCCU1 pin Fault status 0 Low Low Fault 0 Low High Fault 0 High Low OK 0 High High Fault 1 Low Low Fault 1 Low High OK 1 High Low Fault 1 High High Fault Table 209. Fault detection in bistable mode The selection of the pullup /down resistor is done automatically based on the FCCU0 polarity bit, to allow a fault detection upon a pin disconnection. OTP_FCCU0_MODE FCCU0_RPULL_EN FCCU0_POL Internal pull resistor 11 0 X FCCUx tri-stated 11 1 0 FCCU0 = pulldown, FCCU1 = pullup 11 1 1 FCCU0 = pullup, FCCU1 = pulldown Table 210. Pull resistor configuration in bistable mode 14.7.2 Hybrid bistable mode When OTP_FCCU0_MODE[1:0] = 11 and OTP_FCCU1_MODE[1:0] = 11, the FCCU interface will be set to hybrid bistable mode. The Hybrid bistable mode is provided to address a specific use case with the NXP i.MX9x family of microcontrollers supporting the FCCU interface. The i.MX9x FCCU interface is always disabled after a reset condition. In this scenario, the FCCU_ERR0 (connected to FCCU0) will be tri-stated and the WDOG_ANY (connected to FCCU1) will be reporting fault conditions with an edge transition to request a PMIC reset if the MCU detects an internal issue during boot-up. During the booting sequence, the MCU will be in charge of keeping the system in a safe state until it can perform system configuration and enable the FCCU interface to start reporting safety-related failures to the PMIC. When the MCU is ready to enable the FCCU operation, it must request a transition to the full bistable FCCU mode on the PMIC first, in order to avoid a random transition causing a reset condition on the XRESET input PF09 All information provided in this document is subject to legal disclaimers. © 2026 NXP B.V. All rights reserved. Product data sheet Rev. 1.3 — 16 December 2025 Document feedback 159 / 205 |
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